Documentation: Update README and other resources

[jailhouse.git] / TODO

diff --git a/TODO b/TODO
index 80b9fffbc4462f5634e423020dcf809b807eb24a..cc665a7951101eff8e3b53c7ea47ede2dcd89dc8 100644 (file)
--- a/TODO
+++ b/TODO
@@ -1,26 +1,33 @@
 Things to be addressed, at some point. Unsorted, unprioritized, incomplete.
 
 o x86 support
- - DMAR error reporting
- - interrupt remapping support
- - PCI resource access control
-  - bus scanning?
-  - config space
- - AMD (SVM)?
+ - AMD IOMMU support [WIP]
+ - power management
+  - block
+  - allow per cell (managing inter-core/inter-cell impacts)
+ - NMI control/status port - moderation or emulation required?
 o ARM support
-o access control to management interface
- - prevent reconfigurations / overlaps with existing cells when adding new ones
+ - v7 (32-bit) [WIP]
+  - System MMU support
+  - improve UART handover
+  - improve support for platform variations (device tree?)
+ - v8 (64-bit)
+ - support for big endian
+  - infrastructure to support BE architectures (byte-swapping services)
+  - usage of that infrastructure in generic subsystems
+  - specific BE support for ARMv7, then v8
 o configuration
  - add official support to assign resources to multiple cells
-   (shared pages, read-only PIO ports)
+   (shared pages, read-only PIO ports)?
  - review of format, rework of textual representation
  - platform device assignment
- - create base configuration from knowledge base and running system
-o rework paging mechanism
- - fully table-driven
- - add all required x86 paging modes (32-bit, PAE etc.)
- - adjust MMIO to use correct paging mode
- - hugepage support (will drastically reduce memory need)
+ - enhance config generator
+  - confine the created root cell config to the essentially required resources
+    (e.g. PCI BARs)
+  - generate non-root cell configs
+  - add knowledge base about resource access rules that need manual review or
+    configurations that are known to be problematic (e.g. INTx sharing between
+    cells)
 o setup validation
  - check integrity of configurations
  - check integrity of runtime environment (hypervisor core & page_pool,
@@ -28,6 +35,7 @@ o setup validation
   - pure software solution (without security requirements)
   - Intel TXT support?
   - secure boot?
+ - check for execution inside hypervisor, allow only when enabled in config
 o inter-cell communication channel
  - shared memory + doorbell IRQs
  - queues + doorbell?
@@ -35,12 +43,24 @@ o testing
  - build tests for x86 and ARM
  - unit tests?
  - system tests, also in QEMU/KVM
-  - VT-d emulation for QEMU?
+  - VT-d emulation for QEMU [WIP: GSoC project]
 o inmates
  - reusable runtime environment for cell inmates
- - port free small-footprint RTOS to Jailhouse bare-metal environment?
-   candidates could be: RTEMS, eCos, FreeRTOS
+  - skeleton in separate directory
+  - hw access libraries
+   - x86: add TSC calibration
+  - inter-cell communication library
+ - port free small-footprint RTOS to Jailhouse bare-metal environment
+   [WIP: RTEMS]
 o hardware error handling
  - MCEs
  - PCI AER
+ - APEI
+ - Thermal
  - ...
+o monitoring
+ - report error-triggering devices behind IOMMUs via sysfs
+ - hypervisor console via debugfs?
+ - cell software watchdog via comm region messages
+  -> time out pending comm region messages and kill failing cells
+     (includes timeouts of unanswered shutdown requests)