struct jailhouse_irqchip irqchips[1];
__u8 pio_bitmap[0x2000];
struct jailhouse_pci_device pci_devices[13];
- struct jailhouse_pci_capability pci_caps[27];
+ struct jailhouse_pci_capability pci_caps[28];
} __attribute__((packed)) config = {
.header = {
+ .signature = JAILHOUSE_SYSTEM_SIGNATURE,
.hypervisor_memory = {
- .phys_start = 0x3c000000,
+ .phys_start = 0x3b000000,
.size = 0x4000000,
},
- .config_memory = {
- .phys_start = 0xcca64000,
- .size = 0x15000,
+ .debug_console = {
+ .phys_start = 0xe010,
},
.platform_info.x86 = {
.mmconfig_base = 0xf8000000,
.mmconfig_end_bus = 0x3f,
.pm_timer_address = 0x1808,
- },
+ .iommu_units = {
+ {
+ .base = 0xfed90000,
+ .size = 0x1000,
+ },
+ {
+ .base = 0xfed91000,
+ .size = 0x1000,
+ },
+ },
+ },
+ .interrupt_limit = 256,
.root_cell = {
.name = "H87I-PLUS",
/* RAM */ {
.phys_start = 0x0,
.virt_start = 0x0,
- .size = 0x3c000000,
+ .size = 0x3b000000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
/* RAM */ {
- .phys_start = 0x40000000,
- .virt_start = 0x40000000,
- .size = 0x8ca64000,
+ .phys_start = 0x3f000000,
+ .virt_start = 0x3f000000,
+ .size = 0x8da64000,
.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA,
},
.irqchips = {
/* IOAPIC */ {
.address = 0xfec00000,
- .pin_bitmap = 0xffffff,
+ .id = 0x1f0f8,
+ .pin_bitmap = {
+ 0xffffff
+ },
},
},
[ 0/8 ... 0x3f/8] = -1,
[ 0x40/8 ... 0x47/8] = 0xf0, /* PIT */
[ 0x48/8 ... 0x5f/8] = -1,
- [ 0x60/8 ... 0x67/8] = 0x0, /* HACK: 8042, and more? */
+ [ 0x60/8 ... 0x67/8] = 0xec, /* HACK: NMI status/control */
[ 0x68/8 ... 0x6f/8] = -1,
[ 0x70/8 ... 0x77/8] = 0xfc, /* rtc */
[ 0x78/8 ... 0x3af/8] = -1,
/* PCIDevice: 00:00.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0x0,
.caps_start = 0,
/* PCIDevice: 00:01.0 */
{
.type = JAILHOUSE_PCI_TYPE_BRIDGE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0x8,
.caps_start = 1,
.num_caps = 4,
+ .num_msi_vectors = 1,
},
/* PCIDevice: 00:02.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 0,
.domain = 0x0,
.bdf = 0x10,
.caps_start = 5,
.num_caps = 3,
+ .num_msi_vectors = 1,
},
/* PCIDevice: 00:03.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0x18,
.caps_start = 8,
.num_caps = 3,
+ .num_msi_vectors = 1,
},
/* PCIDevice: 00:14.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xa0,
.caps_start = 11,
.num_caps = 2,
+ .num_msi_vectors = 8,
+ .msi_64bits = 1,
},
/* PCIDevice: 00:16.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xb0,
.caps_start = 13,
.num_caps = 2,
+ .num_msi_vectors = 1,
+ .msi_64bits = 1,
},
/* PCIDevice: 00:19.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xc8,
.caps_start = 15,
.num_caps = 3,
+ .num_msi_vectors = 1,
+ .msi_64bits = 1,
},
/* PCIDevice: 00:1a.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xd0,
.caps_start = 18,
/* PCIDevice: 00:1b.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xd8,
.caps_start = 21,
- .num_caps = 3,
+ .num_caps = 4,
+ .num_msi_vectors = 1,
+ .msi_64bits = 1,
},
/* PCIDevice: 00:1d.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xe8,
.caps_start = 18,
/* PCIDevice: 00:1f.0 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xf8,
.caps_start = 0,
/* PCIDevice: 00:1f.2 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xfa,
- .caps_start = 24,
+ .caps_start = 25,
.num_caps = 3,
+ .num_msi_vectors = 1,
},
/* PCIDevice: 00:1f.3 */
{
.type = JAILHOUSE_PCI_TYPE_DEVICE,
+ .iommu = 1,
.domain = 0x0,
.bdf = 0xfb,
.caps_start = 0,
.len = 2,
.flags = 0,
},
+ { /* non-cap registers: HDCTL, TCSEL, DCKCTL,DCKSTS */
+ .start = 0x40,
+ .len = 0x10,
+ .flags = JAILHOUSE_PCICAPS_WRITE,
+ },
/* PCIDevice: 00:1f.2 */
{
.id = 0x5,