uphy: t210: clean up PLLs deinit functions

uphy: t210: clean up PLLs deinit functions

UPHY driver should not assert reset or update regs of
PLLE and PEX/SATA PLLs when they're in HW control.

Removed PLLs deinit functions to avoid it.
Invoking clk_disable_unprepare(uphy->plle) in
suspend_noirq only updates PLLE enable_count as
clk_plle_tegra210_enable won't update PLLE regs if
it's in HW control.

PLLE enable_count is not balanced if system didn't
reach SC7, added check in tegra21x_padctl_uphy_resume
to hadle it properly.

Bug 200305623
Bug 200305881

Change-Id: I6e1726beeba8e361e8556c91ab70e661b8b9b529
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
(cherry picked from commit 116565fcc2af8262c834cc80d59e891df435f4af)
Reviewed-on: http://git-master/r/1499128
Reviewed-by: Hans Yang <hansy@nvidia.com>
Tested-by: Hans Yang <hansy@nvidia.com>
Reviewed-by: WK Tsai <wtsai@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>