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tegra: smmu: Fix high bits setting for ptc flush
authorPavan Kunapuli <pkunapuli@nvidia.com>
Tue, 9 Jul 2013 23:20:03 +0000 (16:20 -0700)
committerDan Willemsen <dwillemsen@nvidia.com>
Wed, 18 Mar 2015 19:24:48 +0000 (12:24 -0700)
commit1ff53382032902ef82fe0e217555d055c7d10020
treee930564fcaa3c966f9a9d32eb8e25fbaa2169d97tree | snapshot
parentb07ccb208387c8322620a3438e5b34a8f874d175commit | diff
tegra: smmu: Fix high bits setting for ptc flush

Set the ptc flush address high bits to 0 to ensure that the ptc flush
is done properly.

Bug 1319012

Change-Id: I05a849db13ff55cc929dd15f29b682742ce6e9ab
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/245635
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
drivers/iommu/tegra-smmu.c diff | blob | history