clk: soc: tegra: Rename DFLL tune1 to tune1_low

clk: soc: tegra: Rename DFLL tune1 to tune1_low

Renamed DFLL tune1 to tune1_low to be consistent with
tune0_low/tune0_high naming convention.

Bug 1967884

Change-Id: Ic3a3270eec6aa270578d9b58459720d9756707f5
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1533307
(cherry picked from commit d4552faac76300b6563e74711e8247ae4f0ebd2a)
Reviewed-on: https://git-master.nvidia.com/r/1534499
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
(cherry picked from commit 08283cf4908c74c863e396497de8cd027085c1d6)