mmc: tegra: Write xfer_mode, CMD regs in together
If there is a gap between xfer mode and command register writes,
tegra SDMMC controller can sometimes issue a spurious command before
the CMD register is written. To avoid this, these two registers need
to be written together in a single write operation.
Bug
200084520
Change-Id: I98db81fd1bc5e4ac87c7604d17b98286e0cd6c9a
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/725471
Tested-by: Ishan Mittal <imittal@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>