/*
* ADMA driver for Nvidia's Tegra ADMA controller.
*
- * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
/* ADMA channel registers */
struct tegra_adma_chan_regs {
+ unsigned long cmd;
unsigned long ctrl;
unsigned long config;
unsigned long src_ptr;
struct tegra_adma_chan *tdc = &tdma->channels[i];
struct tegra_adma_chan_regs *ch_reg = &tdc->channel_reg;
+ ch_reg->cmd = channel_read(tdc, ADMA_CH_CMD);
ch_reg->tc = channel_read(tdc, ADMA_CH_TC);
ch_reg->src_ptr =
channel_read(tdc, ADMA_CH_LOWER_SOURCE_ADDR);
channel_write(tdc, ADMA_CH_AHUB_FIFO_CTRL,
ch_reg->ahub_fifo_ctrl);
channel_write(tdc, ADMA_CH_CONFIG, ch_reg->config);
+ channel_write(tdc, ADMA_CH_CMD, ch_reg->cmd);
}
}
return 0;