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rtime.felk.cvut.cz Git - fpga/zynq/mzed-dc-control-hw.git/log
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kubrdom [Wed, 28 Sep 2016 21:56:48 +0000 (23:56 +0200)]
Added folder cables containing files. These files describe how to make cables.
szabomar [Mon, 5 Sep 2016 09:30:33 +0000 (11:30 +0200)]
DC/DC converter changed from 5V to 3.3V
szabomar [Fri, 19 Aug 2016 09:31:42 +0000 (11:31 +0200)]
Motor driver PMOD rows are swapped
Joel Matejka [Thu, 28 Jul 2016 23:55:28 +0000 (01:55 +0200)]
Updated power part – added transil, bigger VM cappacitor, VREF voltage divider, new power part layout
Pavel Pisa [Mon, 18 Jul 2016 07:34:10 +0000 (09:34 +0200)]
MOTOR_DRIVER by Tomáš Nepivoda - PMOD pins assignment made more readable.
IRC_IRQ pin moved as well to make connection resistant against incorrect
plug-in.
Pavel Pisa [Fri, 15 Jul 2016 13:19:29 +0000 (15:19 +0200)]
OTOR_DRIVER by Tomáš Nepivoda - updated with IRC boost and corrected PMOD pins order.
Pavel Pisa [Fri, 15 Jul 2016 13:17:46 +0000 (15:17 +0200)]
MOTOR_DRIVER by Tomáš Nepivoda - defended bachelor thesis version.
Periferní modul pro řízení stejnosměrných motorů pro platformu Zynq
DC Motor Control Peripheral Module for Zynq Platform
https://dspace.cvut.cz/handle/10467/64713
https://rtime.felk.cvut.cz/hw/index.php/Zynq
projects / fpga / zynq / mzed-dc-control-hw.git / log