]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/log
fpga/zynq/canbench-sw.git
8 years agoAdded patched xilinx_can module, canhwtstamp testing app
Martin Jerabek [Fri, 25 Mar 2016 13:38:00 +0000 (14:38 +0100)]
Added patched xilinx_can module, canhwtstamp testing app

8 years agoadded system and petalinux configuration, scripts, makefiles
Martin Jerabek [Fri, 25 Mar 2016 13:37:12 +0000 (14:37 +0100)]
added system and petalinux configuration, scripts, makefiles

TODO: remove HDL wrappers?

8 years agoInitial commit - CAN benchmark FPGA design and software for MicroZed board.
Pavel Pisa [Fri, 4 Mar 2016 10:03:37 +0000 (11:03 +0100)]
Initial commit - CAN benchmark FPGA design and software for MicroZed board.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>