]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/commit
AXI PWM Coprocessor: PWM generation logic roughly implemented.
authorPavel Pisa <pisa@cmp.felk.cvut.cz>
Fri, 20 May 2016 14:43:49 +0000 (16:43 +0200)
committerPavel Pisa <pisa@cmp.felk.cvut.cz>
Mon, 16 Jan 2017 16:57:20 +0000 (17:57 +0100)
commitd44e52c4a37f22ef2deacec9be5d0094f64e8532
tree3d0859b2abd6966513a4b2b565d427bf1f3aa905
parentf07daf32a7eb355b145e4b08db69efdebe6572db
AXI PWM Coprocessor: PWM generation logic roughly implemented.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0.vhd
system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_M00_AXI.vhd
system/ip/axi_pwm_coprocessor_1.0/hdl/axi_pwm_coprocessor_v1_0_S00_AXI.vhd