]> rtime.felk.cvut.cz Git - fpga/zynq/canbench-sw.git/blobdiff - system/ip/spi_leds_and_enc_1.0/hdl/dff.vhdl
microzed_apo: Include counters to present 8-bit knobs positions.
[fpga/zynq/canbench-sw.git] / system / ip / spi_leds_and_enc_1.0 / hdl / dff.vhdl
diff --git a/system/ip/spi_leds_and_enc_1.0/hdl/dff.vhdl b/system/ip/spi_leds_and_enc_1.0/hdl/dff.vhdl
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+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_arith.all;
+use ieee.std_logic_unsigned.all;
+use ieee.numeric_std.all;
+
+entity dff is
+  port (
+    clock: in std_logic;
+    d: in std_logic;
+    q: out std_logic
+  );
+end dff;
+
+architecture behavioral of dff is
+  signal data: std_logic := '0';
+begin
+  q <= data;
+
+  process
+  begin
+    wait until clock'event and clock = '1';
+    data <= d;
+  end process;
+
+end behavioral;