X-Git-Url: https://rtime.felk.cvut.cz/gitweb/fpga/zynq/canbench-hw.git/blobdiff_plain/f3ff811a037741aff32f32b3d77d76691e864687..aa3474f4a89fcc1d65abeb03f85fad8c0c5a295c:/lib/footprints.pretty/TSSOP20.kicad_mod

diff --git a/lib/footprints.pretty/TSSOP20.kicad_mod b/lib/footprints.pretty/TSSOP20.kicad_mod
new file mode 100644
index 0000000..68f3b37
--- /dev/null
+++ b/lib/footprints.pretty/TSSOP20.kicad_mod
@@ -0,0 +1,36 @@
+(module TSSOP20 (layer F.Cu)
+  (solder_mask_margin 0.0762)
+  (solder_paste_margin -0.0254)
+  (attr smd)
+  (fp_text reference TSSOP20 (at 0 5.08) (layer F.SilkS)
+    (effects (font (size 0.762 0.762) (thickness 0.1524)))
+  )
+  (fp_text value VAL** (at 0 0) (layer F.SilkS) hide
+    (effects (font (size 0.762 0.762) (thickness 0.1524)))
+  )
+  (fp_circle (center -4.2 -3) (end -4 -3) (layer F.SilkS) (width 0.2032))
+  (fp_line (start -2.2 -3.4) (end -2.2 3.4) (layer F.SilkS) (width 0.2032))
+  (fp_line (start -2.2 3.4) (end 2.2 3.4) (layer F.SilkS) (width 0.2032))
+  (fp_line (start 2.2 3.4) (end 2.2 -3.4) (layer F.SilkS) (width 0.2032))
+  (fp_line (start 2.2 -3.4) (end -2.2 -3.4) (layer F.SilkS) (width 0.2032))
+  (pad 19 smd rect (at 2.8 -2.275) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 20 smd rect (at 2.8 -2.925) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 18 smd rect (at 2.8 -1.625) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 17 smd rect (at 2.8 -0.975) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 16 smd rect (at 2.8 -0.325) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 15 smd rect (at 2.8 0.325) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 14 smd rect (at 2.8 0.975) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 13 smd rect (at 2.8 1.625) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 10 smd rect (at -2.8 2.925) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 9 smd rect (at -2.8 2.275) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 8 smd rect (at -2.8 1.625) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 7 smd rect (at -2.8 0.975) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 1 smd rect (at -2.8 -2.925) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 2 smd rect (at -2.8 -2.275) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 3 smd rect (at -2.8 -1.625) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 4 smd rect (at -2.8 -0.975) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 5 smd rect (at -2.8 -0.325) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 6 smd rect (at -2.8 0.325) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 12 smd rect (at 2.8 2.275) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+  (pad 11 smd rect (at 2.8 2.925) (size 1.6 0.3) (layers F.Cu F.Paste F.SilkS F.Mask))
+)