Make RS-232 transmitting work.

[fpga/virtex2/uart.git] / openMSP430_uart.vhd

diff --git a/openMSP430_uart.vhd b/openMSP430_uart.vhd
index 3da87209ca80617a5c27c90dc353180b08051e0a..b1d2a571507f7b4fad44160d0afa5ed245617b80 100644 (file)
--- a/openMSP430_uart.vhd
+++ b/openMSP430_uart.vhd
@@ -7,8 +7,9 @@ entity openMSP430_uart is
   port (
     CLK_24MHz: in std_logic;
     RESET: in std_logic;
-    DISPLAY1: out std_logic_vector(6 downto 0);
-    DISPLAY2: out std_logic_vector(6 downto 0)
+
+    RXD : out std_logic;
+    TXD : in std_logic
   );
 end openMSP430_uart;
 
@@ -264,12 +265,12 @@ begin
     port map (
       irq_port1 => open,
       irq_port2 => open,
-      p1_dout (6 downto 0) => DISPLAY1,
-      p1_dout (7) => open,
+      p1_dout (7 downto 2) => open,
+      p1_dout (1) => RXD,
+      p1_dout (0) => open,
       p1_dout_en => open,
       p1_sel => open,
-      p2_dout (6 downto 0) => DISPLAY2,
-      p2_dout (7) => open,
+      p2_dout => open,
       p2_dout_en => open,
       p2_sel => open,
       p3_dout => open,