library ieee;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_arith.ALL;

--------------------------------------------------------------------------------

entity qcounter_mcu16 is
  port (
    -- Peripheral bus interface
    ACK_O  : out std_logic;
    ADR_I  : in  std_logic;
    CLK_I  : in  std_logic;
    DAT_O  : out std_logic_vector (15 downto 0);
    SEL_I  : in  std_logic;
    STB_I  : in  std_logic;
    -- QCounter component interface
    QCOUNT : in  std_logic_vector (31 downto 0));
end qcounter_mcu16;

--------------------------------------------------------------------------------

architecture behavioral of qcounter_mcu16 is

  -- When reading whole 32-bit qcount input, first QCNTL has to be loaded, because
  -- this event causes QCNTH to latch appropriate value of QCOUNT. This procedure
  -- ensures that correct value is read.

  -- Register of upper 16 bits of QCOUNT input.
  signal upper_qcount : std_logic_vector (15 downto 0);
  signal read_en      : std_logic;
  
--------------------------------------------------------------------------------

begin

  ACK_O <= read_en;
  
  with ADR_I select
    DAT_O <=
    QCOUNT (15 downto 0) when '0',
    upper_qcount         when '1',
    (others => 'X')      when others;

  read_en <= SEL_I and STB_I;

  
  -- Upper qcounter register
  QCNTH : process (CLK_I)
  begin
    if rising_edge(CLK_I) then
      if read_en = '1' then
        upper_qcount <= QCOUNT (31 downto 16);
      end if;
    end if;
  end process;


end behavioral;