# TOP           - Name of the top-level module
# DEVICE        - Name of the FPGA device (device-package-speed)
# PRJ           - Name of .prj file with names of all source files. See XST manual.
# UCF           - Name of the user constraints file
# BMM           - If design contains initialized memories, softcore MCU, etc., this
#                 file describes mapping of .elf file to these memories. Only one
#                 .bmm file can be used.
# SEARCH_DIRS   - Directories to search when searching for netlists (.ngc, ...).
#                 See NGDBUILD manual.
# JTAG_POS      - Position of device in JTAG chain. Used when downloading bit stream.
# INTSTYLE      - Style of screen output. (ise | xflow | silent)
# SRC           - Path to the source directory. All other paths are relative to this.

# Makefile is interconnected with Ocera-makefile system by the following properties
# ARCH
# BOARD
# APP           - application name
# SW_SRC        - directory name within $(SRC) dir where OC-makefile is called.
#                 By default it's software/$(ARCH)-$(BOARD)-$(APP)
# ELF           - File containing initialization data of memories described by
#                 previously defined .bmm file. Format can be .elf or .mem.


# Targets desctiption:
#  - synthesize : Synthesize all VHDL and Verilog source files, libraries, etc.
#                 defined in PRJ files and produces NGC file.
#  - translate  : Translate all netlist files (.ngc, ...) into the NGD file,
#                 where the design is described in terms of deneral logic elements
#                 such as (RAM, flip-flop, XOR, ...).
#  - map        : Map the general logic from NGD file to the components in the
#                 target FPGA and produces NCD_MAP file.
#  - par        : PAR stands for Plase & Route. This procedure takes NCD_MAP file,
#                 places all components and makes routes between them (depending
#                 on the chosen optimization mode) and produces NCD file.
#  - implement  : Transfer placed and routed NCD file into the bit file, which can
#                 be then used to configure particular FPGA. When ELF and BMM is
#                 specified, this procedure fills in location constraints of all
#                 memories in BMM and initialize them with data from ELF.
#  - download   : Download bitfile to the target FPGA (by using Impact).
#  - clean      : Clean build directory, dependency (*.d) files and call
#                 'make clean' in the directory of ELF file.
#  - all        : Do 'clean' and 'implement' targets.

# Dependicies are handled, so in most cases only 'download' target is called.


TOP             = msp430_cmdproc
DEVICE          = xc2v1000-fg456

PRJ             = $(TOP).prj
UCF             = $(TOP).ucf

ARCH            = msp430
BOARD           = virtex2
APP             = cmdproc_test

BMM             = memory.bmm
SW_SRC          = software/$(ARCH)-$(BOARD)-$(APP)
ELF             = $(SW_SRC)/_compiled/bin/$(APP)

SEARCH_DIRS     = 

JTAG_POS        = 2
INTSTYLE        = xflow

SRC             = ..

#===============================================================================
# Abbreviations of frequently used file names.

ifneq ($(strip $(APP)),)
  BITFILE = $(TOP)_elf.bit
else
  BITFILE = $(TOP).bit
endif

BMM_LOCAL       = $(notdir $(BMM))
BMM_LOCAL_BD    = $(basename $(BMM_LOCAL))_bd$(suffix $(BMM))

NGC             = $(TOP).ngc
NGD             = $(TOP).ngd
PCF             = $(TOP).pcf
NCD_MAP         = $(TOP)_map.ncd
NCD             = $(TOP).ncd

#===============================================================================

.PHONY: all synthesize translate map par implement download download-only clean
.PHONY: re-synthesize re-translate re-map re-par

implement: $(BITFILE)

all: clean implement

#===============================================================================

synthesize: $(NGC)
re-synthesize $(NGC): $(addrefix $(SRC)/,$(PRJ))
	echo " \
	  run \
	  $(addprefix -ifn $(SRC)/,$(PRJ)) \
	  -ifmt mixed \
	  -ofn $(TOP).ngc \
	  -ofmt NGC \
	  -top $(TOP) \
	  -p $(DEVICE) \
	  -opt_mode Speed \
	  -opt_level 1" | xst


translate: $(NGD)
re-translate $(NGD): $(NGC) $(SRC)/$(BMM) $(SRC)/$(UCF)
ifneq ($(strip $(BMM)),)
	ln -s -f $(SRC)/$(BMM) $(BMM_LOCAL)
endif
	ngdbuild -intstyle $(INTSTYLE) -p $(DEVICE) -uc $(SRC)/$(UCF) \
	  $(addprefix -bm ,$(BMM_LOCAL)) \
	  $(addprefix -sd $(SRC)/,$(SEARCH_DIRS)) \
	  $(NGC) \
	  $(NGD)

map: $(NCD_MAP) $(PCF)
re-map $(NCD_MAP) $(PCF): $(NGD)
	map -intstyle $(INTSTYLE) -o $(NCD_MAP) $(NGD) $(PCF)

par: $(NCD)
re-par $(NCD): $(NCD_MAP) $(PCF)
	par -intstyle $(INTSTYLE) $(NCD_MAP) -w $(NCD) $(PCF)

$(TOP).bit $(BMM_LOCAL_BD): $(NCD)
	bitgen -w $(NCD) $(TOP).bit $(PCF)

$(TOP)_elf.bit: $(TOP).bit $(BMM_LOCAL_BD) $(SRC)/$(ELF)
	data2mem -bm $(BMM_LOCAL_BD) -bd $(SRC)/$(ELF) -bt $(TOP).bit -o b $(TOP)_elf.bit

.PHONY: $(SRC)/$(ELF)
$(SRC)/$(ELF):
	make -C $(SRC)/$(SW_SRC)
	ln -sf $(APP) $(SRC)/$(ELF).elf

download: $(BITFILE) download-only
download-only:
	/bin/echo -e "\
	setMode -bscan \n\
	cleancablelock \n\
	setCable -port auto \n\
	identify \n\
	assignFile -p $(JTAG_POS) -file $(BITFILE) \n\
	program -p $(JTAG_POS) \n\
	exit" | impact -batch

#===============================================================================

clean:
	ls | grep -v ^Makefile$$ | xargs rm -rf
	rm -f $(addprefix $(SRC)/,$(PRJ:.prj=.d))
	make -C $(SRC)/$(SW_SRC) distclean

#===============================================================================

%.d: %.prj
	@sed -e 's/#.*//' \
	     -e 's/[ \t][ \t]*/ /g' \
	     -e 's/^ //' -e 's/ $$//' \
	     -e '/"/d' \
	     -e '/^$$/d' \
	     -e 's|\(.*\) \(.*\) \(.*\)|$<: $(dir $<)\3|' \
	     <$< >$@

%.prj:
	touch $@

include $(addprefix $(SRC)/,$(PRJ:.prj=.d))