Complete design added.

[fpga/spartan2/qcounter.git] / hex2lcd.vhd

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+library IEEE;
+use IEEE.STD_LOGIC_1164.all;
+use IEEE.STD_LOGIC_ARITH.all;
+use IEEE.STD_LOGIC_UNSIGNED.all;
+
+--------------------------------------------------------------------------------
+-- This module implements combinatorial circuit converting a 4 digit binary
+-- number into the format of display segments.
+--------------------------------------------------------------------------------
+
+entity hex2lcd is
+  port (
+    hex : in  std_logic_vector (3 downto 0);
+    lcd : out std_logic_vector (6 downto 0));
+end hex2lcd;
+
+--------------------------------------------------------------------------------
+
+architecture behavioral of hex2lcd is
+begin
+  
+  with hex select lcd <=
+    "0000110" when "0001",
+    "1011011" when "0010",
+    "1001111" when "0011",
+    "1100110" when "0100",
+    "1101101" when "0101",
+    "1111101" when "0110",
+    "0000111" when "0111",
+    "1111111" when "1000",
+    "1101111" when "1001",
+    "1110111" when "1010",
+    "1111100" when "1011",
+    "0111001" when "1100",
+    "1011110" when "1101",
+    "1111001" when "1110",
+    "1110001" when "1111",
+    "0111111" when others;
+  
+end Behavioral;
+