From bd18e9490dc33e857c4e857e6efd9be683f6ad21 Mon Sep 17 00:00:00 2001 From: Martin Prudek Date: Thu, 7 May 2015 12:34:58 +0200 Subject: [PATCH] Changed positions of PWM duty cycle bits in SPI communication. --- pmsm-control/rpi_pmsm_control.vhdl | 9 ++++----- pmsm-control/test_sw/main_pmsm.c | 27 ++++++++++++++------------- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/pmsm-control/rpi_pmsm_control.vhdl b/pmsm-control/rpi_pmsm_control.vhdl index 501fd6b..27ca4d8 100644 --- a/pmsm-control/rpi_pmsm_control.vhdl +++ b/pmsm-control/rpi_pmsm_control.vhdl @@ -393,11 +393,10 @@ begin elsif (ce0_old = "01") then --rising edge of SS, we should read the data pwm_en_p(1 to 3)<=dat_reg(126 downto 124); pwm_en_n(1 to 3)<=dat_reg(123 downto 121); - --11 bit pwm TODO: make it generic - pwm_match(1)(pwm_width-1 downto 0)<=dat_reg(66 downto 56); - pwm_match(2)(pwm_width-1 downto 0)<=dat_reg(55 downto 45); - -- 12 + 11 Unused - pwm_match(3)(pwm_width-1 downto 0)<=dat_reg(42 downto 32); + --usable for up to 16-bit PWM duty cycle resolution (pwm_width): + pwm_match(1)(pwm_width-1 downto 0)<=dat_reg(pwm_width+31 downto 32); + pwm_match(2)(pwm_width-1 downto 0)<=dat_reg(pwm_width+15 downto 16); + pwm_match(3)(pwm_width-1 downto 0)<=dat_reg(pwm_width-1 downto 0); income_data_valid<='1'; end if; end process; diff --git a/pmsm-control/test_sw/main_pmsm.c b/pmsm-control/test_sw/main_pmsm.c index 5759c97..4e64f95 100644 --- a/pmsm-control/test_sw/main_pmsm.c +++ b/pmsm-control/test_sw/main_pmsm.c @@ -185,17 +185,18 @@ void prepare_tx(uint8_t * tx){ * bit 89 - shutdown3 * . * . + * Unused * . - * bits 66 .. 56 - match PWM1 - * bits 55 .. 45 - match PWM2 - * bit 11,12 - Unused - * bits 42 .. 32 - match PWM3 + * . + * bits 47 .. 32 - match PWM1 + * bits 31 .. 16 - match PWM2 + * bits 15 .. 0 - match PWM3 */ uint16_t tmp; - /* keep the cap*/ + /* keep the 11-bit cap*/ if (rps.pwm1>2047) rps.pwm1=2047; if (rps.pwm2>2047) rps.pwm2=2047; @@ -203,19 +204,19 @@ void prepare_tx(uint8_t * tx){ tx[0]=rps.test; /*bit 94 - enable PWM1*/ + /*now we have to switch the bytes due to endianess */ + /* ARMv6 & ARMv7 instructions are little endian */ /*pwm1*/ - tx[7]=(tx[7] & 0xF8) | (0x07 & ((uint8_t*)&rps.pwm1)[1]); /*MSB*/ - tx[8]=((uint8_t*)&rps.pwm1)[0]; /*LSB*/ + tx[10]=((uint8_t*)&rps.pwm1)[1]; /*MSB*/ + tx[11]=((uint8_t*)&rps.pwm1)[0]; /*LSB*/ /*pwm2*/ - tmp=rps.pwm2; - tmp<<=5; - tx[9]=((uint8_t*)&tmp)[1]; /*MSB*/ - tx[10]=(tx[10] & 0x1F) | (0xE0 & ((uint8_t*)&tmp)[0]); /*LSB*/ + tx[12]=((uint8_t*)&rps.pwm2)[1]; /*MSB*/ + tx[13]=((uint8_t*)&rps.pwm2)[0]; /*LSB*/ /*pwm3*/ - tx[10]=(tx[10] & 0xF8) | (0x07 & ((uint8_t*)&rps.pwm3)[1]); /*MSB*/ - tx[11]=((uint8_t*)&rps.pwm3)[0]; /*LSB*/ + tx[14]=((uint8_t*)&rps.pwm3)[1]; /*MSB*/ + tx[15]=((uint8_t*)&rps.pwm3)[0]; /*LSB*/ } -- 2.39.2