From a7960766dfbb06ecb3769d653a41ae824437204d Mon Sep 17 00:00:00 2001 From: Martin Prudek Date: Sun, 3 May 2015 12:34:19 +0200 Subject: [PATCH] Removed duplicate signal adc_reset. --- pmsm-control/rpi_pmsm_control.vhdl | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/pmsm-control/rpi_pmsm_control.vhdl b/pmsm-control/rpi_pmsm_control.vhdl index 413f11c..501fd6b 100644 --- a/pmsm-control/rpi_pmsm_control.vhdl +++ b/pmsm-control/rpi_pmsm_control.vhdl @@ -167,7 +167,6 @@ architecture behavioral of rpi_pmsm_control is end component; - signal adc_reset : std_logic; signal adc_channels: std_logic_vector(71 downto 0); signal adc_m_count: std_logic_vector(8 downto 0); @@ -293,7 +292,7 @@ begin port map( clk => gpio_clk, divided_clk => clk_4M17, - adc_reset => adc_reset, + adc_reset => income_data_valid, --reset at each SPI cycle,TODO: replace with PLL reset adc_miso => adc_miso, adc_channels => adc_channels, adc_sclk => adc_sclk, @@ -391,9 +390,7 @@ begin --data order schould be: ch2 downto ch0 downto ch1 dat_reg(71 downto 0) <= adc_channels(71 downto 0); --current mesurments spi_miso <= position(31); --prepare the first bit on SE activation - adc_reset<='0'; --remove reset flag, and wait on its rising edge elsif (ce0_old = "01") then --rising edge of SS, we should read the data - adc_reset<='1'; pwm_en_p(1 to 3)<=dat_reg(126 downto 124); pwm_en_n(1 to 3)<=dat_reg(123 downto 121); --11 bit pwm TODO: make it generic -- 2.39.2