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rtime.felk.cvut.cz Git - fpga/rpi-motor-control.git/log
Martin Prudek [Fri, 9 Oct 2015 17:05:02 +0000 (19:05 +0200)]
Added forgotten files.
Pavel Pisa [Tue, 6 Oct 2015 17:06:37 +0000 (19:06 +0200)]
Correct logic to detect failed SPI communication and add option switch PWM to pass-through modes.
DIP SW 1 ON enabled direct IRC pass-through to GPIO pins.
When DIP SW2 is selected then PWM can be controlled by GPIO.
SW3 select between direction and PWM mode and complete 3 phase
and 3 enables signals control mode.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Tue, 6 Oct 2015 16:57:00 +0000 (18:57 +0200)]
Remove unused package and swap DIP switch order to match board.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Tue, 6 Oct 2015 16:56:13 +0000 (18:56 +0200)]
Update planned pin mapping for simple DC moor control to can be combined with SPI based one.
IRC B signal moved from gpio7,8 to gpio25,27.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Martin Prudek [Sun, 4 Oct 2015 14:34:59 +0000 (16:34 +0200)]
Added UNTESTED version of spi-commands-lost detection.
Martin Prudek [Sun, 4 Oct 2015 14:11:17 +0000 (16:11 +0200)]
SW repair for 'IRC malfunction'
Martin Prudek [Sun, 4 Oct 2015 14:07:24 +0000 (16:07 +0200)]
FIX: dff3.vhdl added to syn.tcl.
Martin Prudek [Sun, 4 Oct 2015 14:05:28 +0000 (16:05 +0200)]
Dff3 filter added to irc inputs.
Pavel Pisa [Tue, 29 Sep 2015 16:01:01 +0000 (18:01 +0200)]
Document use of pins for motor control experimental designs.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Martin Prudek [Tue, 4 Aug 2015 19:37:25 +0000 (21:37 +0200)]
Simple frequency divider replaced with more complex counter.
Martin Prudek [Thu, 21 May 2015 20:42:50 +0000 (22:42 +0200)]
Commit of version on DVD.
Martin Prudek [Wed, 20 May 2015 19:45:27 +0000 (21:45 +0200)]
Cosmetic changes.
Martin Prudek [Wed, 20 May 2015 19:43:24 +0000 (21:43 +0200)]
Regulation function now implemented with use of polymorphism.
Martin Prudek [Wed, 20 May 2015 19:23:56 +0000 (21:23 +0200)]
Function Init_logs moved to right place.
Martin Prudek [Wed, 20 May 2015 19:19:30 +0000 (21:19 +0200)]
Setters made inline.
Martin Prudek [Wed, 20 May 2015 19:16:00 +0000 (21:16 +0200)]
Commutation function now implemented with use of polymorphism.
Martin Prudek [Wed, 20 May 2015 17:33:03 +0000 (19:33 +0200)]
Remeoved unnecessary code.
Martin Prudek [Wed, 20 May 2015 17:27:38 +0000 (19:27 +0200)]
Logging function moved to separate file.
Martin Prudek [Wed, 20 May 2015 17:08:21 +0000 (19:08 +0200)]
Speed, index and position computations moved to separate file.
Martin Prudek [Wed, 20 May 2015 16:52:56 +0000 (18:52 +0200)]
All SPI stuff moved to rp_spi.c
Martin Prudek [Wed, 20 May 2015 16:19:41 +0000 (18:19 +0200)]
Commutators moved to separate file.
Martin Prudek [Wed, 20 May 2015 15:40:27 +0000 (17:40 +0200)]
Controllers moved to separate file.
Martin Prudek [Wed, 20 May 2015 14:48:13 +0000 (16:48 +0200)]
PI reg. constants modified according rltool results. Added possibility to interactively change offset between 'alpha' and 'a' exis.
Martin Prudek [Wed, 20 May 2015 13:27:11 +0000 (15:27 +0200)]
Matlab script removed limits flag.
Martin Prudek [Wed, 20 May 2015 13:24:38 +0000 (15:24 +0200)]
Matlab script to read logs commented.
Martin Prudek [Sun, 17 May 2015 10:45:39 +0000 (12:45 +0200)]
Added MATLAB script to visualize logs.
Martin Prudek [Sun, 17 May 2015 10:41:49 +0000 (12:41 +0200)]
Changes made to logging process.
Martin Prudek [Sat, 16 May 2015 20:30:34 +0000 (22:30 +0200)]
Loging process modified. Now logging time, position, 3xpwm.
Martin Prudek [Sat, 16 May 2015 19:47:57 +0000 (21:47 +0200)]
Now it is possible to log state data.
Martin Prudek [Sat, 16 May 2015 15:00:23 +0000 (17:00 +0200)]
Speed regulation with zero error.
Martin Prudek [Sat, 16 May 2015 14:40:50 +0000 (16:40 +0200)]
Added speed regulation.
Martin Prudek [Sat, 16 May 2015 13:53:56 +0000 (15:53 +0200)]
Added speed computation.
Martin Prudek [Sat, 16 May 2015 12:03:04 +0000 (14:03 +0200)]
Modified program exit behavior.
Martin Prudek [Sat, 16 May 2015 10:24:12 +0000 (12:24 +0200)]
Controll loop now more complex.
Martin Prudek [Sat, 16 May 2015 09:54:47 +0000 (11:54 +0200)]
Added user-friendly interface.
Martin Prudek [Sat, 16 May 2015 09:30:40 +0000 (11:30 +0200)]
Changed naming convetions, pid modified
Martin Prudek [Fri, 15 May 2015 13:28:43 +0000 (15:28 +0200)]
Changes in natations were made to keep consistency with bachelor thesis.
Martin Prudek [Thu, 14 May 2015 19:55:40 +0000 (21:55 +0200)]
Minor changes to status monitor.
Martin Prudek [Thu, 14 May 2015 19:52:10 +0000 (21:52 +0200)]
Added computation of of phase voltages for delta motor connection. There are now no more motor vibrations.
Martin Prudek [Mon, 11 May 2015 14:27:30 +0000 (16:27 +0200)]
Added inverse park, clark commutator.
Martin Prudek [Mon, 11 May 2015 14:26:51 +0000 (16:26 +0200)]
Added preprocessor to prevent redefinition.
Martin Prudek [Sun, 10 May 2015 20:02:47 +0000 (22:02 +0200)]
Correction of position of subroutines.
Martin Prudek [Sun, 10 May 2015 19:59:24 +0000 (21:59 +0200)]
Moved monitor printoutand added better init for rpi_state.
Martin Prudek [Sun, 10 May 2015 19:24:45 +0000 (21:24 +0200)]
State structure moved to separate file. Cmd poll function moved to separate file.
Martin Prudek [Sun, 10 May 2015 18:50:31 +0000 (20:50 +0200)]
Simplified multiplication in phase duty computation.
Martin Prudek [Sun, 10 May 2015 14:52:23 +0000 (16:52 +0200)]
Correction.
Martin Prudek [Sun, 10 May 2015 14:48:50 +0000 (16:48 +0200)]
Collectin code of 11 bit multiplication.
Martin Prudek [Sun, 10 May 2015 10:55:21 +0000 (12:55 +0200)]
Added detection os index signal lost.
Martin Prudek [Sun, 10 May 2015 10:46:18 +0000 (12:46 +0200)]
Renamed variables.
Martin Prudek [Sun, 10 May 2015 09:18:33 +0000 (11:18 +0200)]
Changed computation of distance to index - there's no detection of index position lost.
Martin Prudek [Sun, 10 May 2015 09:17:34 +0000 (11:17 +0200)]
Added inicializing of income data structure.
Martin Prudek [Fri, 8 May 2015 16:44:17 +0000 (18:44 +0200)]
Added locking application in RAM.
Martin Prudek [Fri, 8 May 2015 16:31:30 +0000 (18:31 +0200)]
Upgareded priority and scheduler settings of new threads. Inspired by Pavel Pisa's solution.
Martin Prudek [Fri, 8 May 2015 12:52:33 +0000 (14:52 +0200)]
Usleep replaced by clock_nasosleep.
Martin Prudek [Thu, 7 May 2015 14:44:39 +0000 (16:44 +0200)]
Changed frequency to test,
Martin Prudek [Thu, 7 May 2015 12:41:05 +0000 (14:41 +0200)]
Bug fix: unconsistent changes of match signal caused twitches im motor movement. The match signal is now changed only at the end ow pwm cycle.
Martin Prudek [Thu, 7 May 2015 10:34:58 +0000 (12:34 +0200)]
Changed positions of PWM duty cycle bits in SPI communication.
Martin Prudek [Sun, 3 May 2015 10:34:19 +0000 (12:34 +0200)]
Removed duplicate signal adc_reset.
Martin Prudek [Sun, 3 May 2015 10:21:09 +0000 (12:21 +0200)]
Added synchronous detection o divided clk signal to adc_reader component.
Martin Prudek [Sat, 2 May 2015 11:52:16 +0000 (13:52 +0200)]
Bug fix: Added data propagation to MISO on falling edge of SE signal.
Pavel Pisa [Fri, 1 May 2015 22:49:42 +0000 (00:49 +0200)]
Correct RPi-MI-1 board name to match PCB text.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Fri, 1 May 2015 17:01:36 +0000 (19:01 +0200)]
Change license to LGPL and GPLv3+ options, fill authors according their real work on the project.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Fri, 1 May 2015 16:12:28 +0000 (18:12 +0200)]
PMSM design: use signals with descriptive names for pins connected to RPi SPI.
Remove these pins from global dummy signal expression which is used to
suppress error for nonexistent/eliminated design signals referrenced by PDC.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Fri, 1 May 2015 15:48:28 +0000 (17:48 +0200)]
Change IRC recognition logic synchronous with main design clock.
Use of external, not synchronized signal event as
the trigger condition results in creation of additional
clock domain which can result in all kinds of hazard
conditions when used to manipulate with else synchronous
design state.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Fri, 1 May 2015 15:02:07 +0000 (17:02 +0200)]
Include SDC Synopsys Design Constraints file to the design file lists.
This file allows fine definition of clocks relations and parameters.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Fri, 1 May 2015 14:59:49 +0000 (16:59 +0200)]
Include in PMSM design to implement safe behavior when external clocks are not present.
The PLL is configured to synthesize 200 MHz clock from 50 MHz input.
The clock monitor holds PWM outputs low if the external clocks are
not present. The reference lost is recognized 6 in 8 cycles
of 200 MHz synthesized clock as well.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Pavel Pisa [Fri, 1 May 2015 14:53:31 +0000 (16:53 +0200)]
Rename PMSM control design top level component to match VHDL file name and function.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Martin Prudek [Thu, 30 Apr 2015 16:42:12 +0000 (18:42 +0200)]
Modified ADC clk frequency from 3.2 MHz to 2.08Mhz
Martin Prudek [Sun, 26 Apr 2015 19:36:26 +0000 (21:36 +0200)]
Complete commutation keeping vector of stator magnetic field perpendicular to vector of rotor magnetic field.
Martin Prudek [Sat, 18 Apr 2015 18:27:21 +0000 (20:27 +0200)]
Simple IRC position commutator added. And Very simple PID reg. added.
Martin Prudek [Sat, 18 Apr 2015 16:52:09 +0000 (18:52 +0200)]
State variables moved to new structure 'rpi_state'. Added semaphore to controll access to them. Also added computation of distance to index position.
Martin Prudek [Sat, 18 Apr 2015 13:30:27 +0000 (15:30 +0200)]
Added counter-clockwise simple hall comutator.
Martin Prudek [Thu, 16 Apr 2015 19:35:51 +0000 (21:35 +0200)]
Added simple commutator.
Martin Prudek [Thu, 16 Apr 2015 17:25:43 +0000 (19:25 +0200)]
Added reading of irc_index position.
Martin Prudek [Thu, 16 Apr 2015 14:02:32 +0000 (16:02 +0200)]
Attemp to solve bug. ADC channels association should be pwm1-ch0 pwm2-ch1 pwm3-ch2 (according to schema). In fact it is pwm1-ch1 pwm2-ch2 pwm3-ch0. Cant find the mistake.
Martin Prudek [Thu, 16 Apr 2015 09:59:39 +0000 (11:59 +0200)]
Sending unique measured current value was replaced by current accumulator. Now multiple summarised values are sent alongside with its count.
Martin Prudek [Wed, 15 Apr 2015 19:04:19 +0000 (21:04 +0200)]
Current measurment bits transferring via SPI from FPGA to RPi extended from 12 to 24 bits. This is preparation for transferring sum of currents.
Martin Prudek [Wed, 15 Apr 2015 18:31:58 +0000 (20:31 +0200)]
Bit positioning description changed after switching to 128-bit SPI.
Martin Prudek [Wed, 15 Apr 2015 17:25:08 +0000 (19:25 +0200)]
Added testing SW in folder test_sw.
Martin Prudek [Wed, 15 Apr 2015 14:59:51 +0000 (16:59 +0200)]
FPGA<->RPiSPI data frame extended from 96bits to 128bits
Martin Prudek [Wed, 15 Apr 2015 13:46:14 +0000 (15:46 +0200)]
Project renamed 'to rpi_pmsm_control'.
Martin Prudek [Sun, 12 Apr 2015 13:21:41 +0000 (15:21 +0200)]
Added ADC reset after each FPGA<->RPi transfer. ADC channels manipulation improved.
Martin Prudek [Sun, 12 Apr 2015 11:29:11 +0000 (13:29 +0200)]
Transfer of PWM match data verified. Added back transmission of PWM match for debug purposses.
Martin Prudek [Sat, 11 Apr 2015 09:46:32 +0000 (11:46 +0200)]
ADC reader moved to separate file.
Martin Prudek [Sat, 11 Apr 2015 09:17:06 +0000 (11:17 +0200)]
Disconnect PWM generators for debug purpose.
Martin Prudek [Sat, 11 Apr 2015 09:14:13 +0000 (11:14 +0200)]
GPCLK frequency from RPi increased from 2Mhz to 50Mhz. To keep clk frequency for ADC lower then 3.2Mhz, freqency divider(divides by 8) have been added.
Martin Prudek [Fri, 10 Apr 2015 09:57:54 +0000 (11:57 +0200)]
Integration of mcpwm into toplevel entity.
Martin Prudek [Thu, 9 Apr 2015 17:57:20 +0000 (19:57 +0200)]
PWM entity file added.
Martin Prudek [Mon, 6 Apr 2015 14:20:56 +0000 (16:20 +0200)]
Tested version of ADC.
Martin Prudek [Sun, 5 Apr 2015 15:27:53 +0000 (17:27 +0200)]
Tested version of ADC state machine. Tested only to prove that 'something works'. Cannot verify measured data - so thah implemented communication protocol might not be workung.
Martin Prudek [Sun, 5 Apr 2015 14:54:53 +0000 (16:54 +0200)]
Little changes to get rid of warnings.
Martin Prudek [Sun, 5 Apr 2015 14:11:00 +0000 (16:11 +0200)]
ADC state machine upgraded (reset added), ready for testing.
Martin Prudek [Sun, 5 Apr 2015 13:10:33 +0000 (15:10 +0200)]
ADC basic state machine. Not complete.
Martin Prudek [Sun, 5 Apr 2015 11:39:36 +0000 (13:39 +0200)]
SPI trigger changed to rising edge (formely falling)
Martin Prudek [Sat, 4 Apr 2015 17:21:32 +0000 (19:21 +0200)]
Hall sensors output added to spi frame.
Martin Prudek [Sat, 4 Apr 2015 16:55:12 +0000 (18:55 +0200)]
Unused CLKINT for SCLK removed.
Martin Prudek [Sat, 4 Apr 2015 16:47:22 +0000 (18:47 +0200)]
Unused lines removed.
Martin Prudek [Sat, 4 Apr 2015 16:43:29 +0000 (18:43 +0200)]
Spi upgrade. Previous solution didnt catch all the rising edges of SS.
Martin Prudek [Sun, 29 Mar 2015 19:00:14 +0000 (21:00 +0200)]
qcounter.vhdl and dff.vhdl added to syn.tcl
Martin Prudek [Sat, 28 Mar 2015 14:17:22 +0000 (15:17 +0100)]
priprava na odesilani pozicez qcounteru - nelze synthetizovat