]> rtime.felk.cvut.cz Git - fpga/rpi-motor-control.git/history - pmsm-control/rpi_pmsm_control.vhdl
Change IRC recognition logic synchronous with main design clock.
[fpga/rpi-motor-control.git] / pmsm-control / rpi_pmsm_control.vhdl
2015-05-01 Pavel PisaChange IRC recognition logic synchronous with main...
2015-05-01 Pavel PisaInclude in PMSM design to implement safe behavior when...
2015-05-01 Pavel PisaRename PMSM control design top level component to match...
2015-04-30 Martin PrudekModified ADC clk frequency from 3.2 MHz to 2.08Mhz
2015-04-16 Martin PrudekAdded reading of irc_index position.
2015-04-16 Martin PrudekAttemp to solve bug. ADC channels association should...
2015-04-16 Martin PrudekSending unique measured current value was replaced...
2015-04-15 Martin PrudekCurrent measurment bits transferring via SPI from FPGA...
2015-04-15 Martin PrudekFPGA<->RPiSPI data frame extended from 96bits to 128bits
2015-04-15 Martin PrudekProject renamed 'to rpi_pmsm_control'.