From: Martin Prudek <prudemar@fel.cvut.cz>
Date: Sun, 22 Mar 2015 14:05:37 +0000 (+0100)
Subject: test spi - nefunkcni synteza pro sensitivity  gpio11
X-Git-Url: https://rtime.felk.cvut.cz/gitweb/fpga/rpi-motor-control.git/commitdiff_plain/7d697dd53a5e8ce42b15a962832b65b543c26ca1

test spi - nefunkcni synteza pro sensitivity  gpio11
---

diff --git a/pmsm-control/rpi_mc_simple_dc.vhdl b/pmsm-control/rpi_mc_simple_dc.vhdl
index 1198651..94f1188 100644
--- a/pmsm-control/rpi_mc_simple_dc.vhdl
+++ b/pmsm-control/rpi_mc_simple_dc.vhdl
@@ -30,10 +30,10 @@ entity rpi_mc_simple_dc is
     gpio24: out std_logic; -- SD1DAT0
     gpio10: in std_logic; -- SPI0MOSI
     gpio9: in std_logic; -- SPI0MISO
-    gpio25: in std_logic; -- SD1DAT1
+    gpio25: out std_logic; -- SD1DAT1
     gpio11: in std_logic; -- SPI0SCLK
-    gpio8: out std_logic; -- SPI0CE0
-    gpio7: out std_logic; -- SPI0CE1
+    gpio8: in std_logic; -- SPI0CE0
+    gpio7: in std_logic; -- SPI0CE1
     gpio5: in std_logic; -- GPCLK1
     gpio6: in std_logic; -- GPCLK2
     gpio12: in std_logic; -- PWM0
@@ -78,7 +78,7 @@ entity rpi_mc_simple_dc is
     can_rx: in std_logic;
     can_tx: in std_logic;
     -- DIP switch
-    dip_sw: in std_logic_vector (1 to 3);
+    dip_sw: in std_logic_vector (1 to 3); --na desce je prohozene cislovanni
     -- Unused terminal to keep design tools silent
     dummy_unused : out std_logic
     );
@@ -101,6 +101,8 @@ attribute syn_hier :boolean;
   -- end component;
   --
   signal pwm_in, pwm_dir_in: std_logic;
+    signal spi_clk: std_logic;
+  signal dat_reg : STD_LOGIC_VECTOR (7 downto 0); --registr pro SPI
 
 --  attribute syn_noprune of gpio2 : signal is true;
 --  attribute syn_preserve of gpio2 : signal is true;
@@ -124,38 +126,74 @@ begin
                                            -- upon power-on
 --   clock <= clkm;
 
-  dummy_unused <= gpio2 and gpio3 and gpio4 and
-     gpio5 and gpio6 and gpio9 and
-     gpio10 and gpio11 and gpio12 and gpio13 and gpio14 and
-     gpio15 and gpio16 and gpio17 and gpio19 and
-     gpio20 and gpio21 and
-     gpio25 and gpio26 and gpio27 and
+  dummy_unused <= gpio2 and gpio3  and gpio4 and
+     gpio5 and gpio6 and
+     gpio12 and gpio13 and gpio14 and
+     gpio15 and gpio16 and gpio19 and
+     gpio20 and gpio21 and gpio26 and
      stat(1) and stat(2) and stat(3) and
      hal_in(1) and hal_in(2) and hal_in(3) and
      irc_i and power_stat and adc_miso and adc_mosi and adc_sclk and adc_scs and
-     ext_miso and ext_mosi and ext_sclk and ext_scs0 and ext_scs1 and ext_scs2 and
      rs485_rxd and
      can_rx and can_tx and
-     dip_sw(1) and dip_sw(2) and dip_sw(3);
-
+     dip_sw(2) and dip_sw(3) and
+     irc_a and irc_b and
+     gpio17 and gpio18 and gpio27 and gpio22 and
+     gpio8 and gpio9 and gpio11 and gpio7 and gpio10 and
+     ext_scs1 and ext_scs2 and ext_miso and ext_mosi and ext_sclk and ext_scs0;
   rs485_txd <= '1';
   rs485_dir <= '0';
 
-  gpio23 <= irc_a;
-  gpio24 <= irc_a;
-
-  gpio7 <= '1';
-  gpio8 <= irc_b;
-
-  pwm_in <= gpio18;
-  pwm_dir_in <= gpio22;
+ -- gpio4 <= '0';
+  --gpio17 <= '0';
+  --gpio18 <= '0';
+  --gpio27 <= '0';
+  --gpio22 <= '0';
+  --gpio23 <= '0';
+  --gpio24 <= '0';
+  --gpio25 <= '0';
+   gpio24 <= dip_sw(1); --na desce je prohozene cislovani
 
   shdn(1) <= '0';
   shdn(2) <= '0';
   shdn(3) <= '1';
 
-  pwm(1) <= pwm_in and not pwm_dir_in;
-  pwm(2) <= pwm_in and pwm_dir_in;
+  pwm(1) <= '0';
+  pwm(2) <= '0';
   pwm(3) <= '0';
 
+
+  
+    process (gpio11) --nufunguje preo piny 11,17,27 funguje pro 4,18,22,ext_sclk,10
+    begin
+        --if (gpio11'event and gpio11 = '1') then  -- rising edge of SCK
+        if (rising_edge(gpio11)) then 
+            --if (gpio7 = '0') then             -- SPI CS must be selected
+                -- shift serial data into dat_reg on each rising edge
+                -- of SCK, MSB first
+                dat_reg(7 downto 0) <= dat_reg(6 downto 0) & gpio10;
+                
+               -- gpio4 <= dat_reg(7);
+		--gpio17 <= dat_reg(6);
+		--gpio18 <= dat_reg(5);
+		--gpio27 <= dat_reg(4);
+		--gpio22 <= dat_reg(3);
+		gpio23 <= dat_reg(2);
+		--gpio24 <= dat_reg(1);
+	--	gpio25 <= dat_reg(0);
+	
+                
+           -- end if;
+       end if;
+    end process;
+    
+--    process (gpio11)
+--    begin
+--	if (rising_edge(gpio11)) then
+--	  gpio25 <= '1';
+--	elsif (falling_edge(gpio11)) then
+--	  gpio25 <= '0';
+--	end if;
+--  end process;
+
 end behavioral;