Attemp to solve bug. ADC channels association should be pwm1-ch0 pwm2-ch1 pwm3-ch2...

[fpga/rpi-motor-control.git] / pmsm-control / rpi_pmsm_control.vhdl

diff --git a/pmsm-control/rpi_pmsm_control.vhdl b/pmsm-control/rpi_pmsm_control.vhdl
index 47fd12c8615e667018b2249a3439c9b9a8efa31f..52e362f59b67c291bd1c398cb8aed21f27fea020 100644 (file)
--- a/pmsm-control/rpi_pmsm_control.vhdl
+++ b/pmsm-control/rpi_pmsm_control.vhdl
@@ -296,8 +296,8 @@ begin
 
 
        pwm(1) <= pwm_sig(1) and dip_sw(1);
-       pwm(2) <= pwm_sig(2) and dip_sw(1);
-       pwm(3) <= pwm_sig(3) and dip_sw(1);
+       pwm(2) <= pwm_sig(2) and dip_sw(2);
+       pwm(3) <= pwm_sig(3) and dip_sw(3);
        
                
        
@@ -349,6 +349,7 @@ begin
                        dat_reg(89 downto 87) <= pwm_en_n(1 to 3); --shutdown
                        dat_reg(86 downto 81) <= (others=>'0');--pwm_match(1)(10 downto 5); --6 MSb of PWM1
                        dat_reg(80 downto 72) <=adc_m_count(8 downto 0);        --count of measurments
+                       --data order schould be: ch2 downto ch0 downto ch1
                        dat_reg(71 downto 0) <= adc_channels(71 downto 0);      --current mesurments
                        adc_reset<='0'; --remove reset flag, and wait on its rising edge
                elsif (ce0_old = "01") then --rising edge of SS, we should read the data