+++ /dev/null
--- provides frequency division by 12
--- initialy intended to make 4.17Mhz from 50Mhz
-
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.numeric_std.all;
-use work.util.all;
-
-entity divider is
-
-port (
- clk_in: in std_logic;
- div12: out std_logic
-);
-end divider;
-
-
-architecture behavioral of divider is
- signal count : std_logic_vector (2 downto 0);
- signal tmp : std_logic;
-begin
-
-
- divider : process
- begin
- wait until (clk_in'event and clk_in='1');
- if (count(2 downto 1)="11") then
- count<="000";
- tmp <= not tmp;
- else
- count <= std_logic_vector(unsigned(count) + 1);
- end if;
- div12<=tmp;
- end process divider;
-
-
-
-end behavioral;
-