Added reading of irc_index position.

[fpga/rpi-motor-control.git] / pmsm-control / rpi_pmsm_control.vhdl

diff --git a/pmsm-control/rpi_pmsm_control.vhdl b/pmsm-control/rpi_pmsm_control.vhdl
index 9e606752b9089f3cb78bea2ffd76d23e0c6ce2cc..45ea914ac46af22bba59f04304c3b76918f55d25 100644 (file)
--- a/pmsm-control/rpi_pmsm_control.vhdl
+++ b/pmsm-control/rpi_pmsm_control.vhdl
@@ -149,20 +149,23 @@ architecture behavioral of rpi_mc_simple_dc is
                adc_channels: out std_logic_vector (35 downto 0);       --consistent data of 3 channels
                adc_sclk: out std_logic;                                --spi clk
                adc_scs: out std_logic;                                 --spi slave select
-               adc_mosi: out std_logic                                 --spi master out slave in
+               adc_mosi: out std_logic;                                --spi master out slave in
+               measur_count: out std_logic_vector(8 downto 0)          --number of accumulated measurments
        
        );
        end component;
        
        
        signal adc_reset : std_logic;
-       signal adc_channels: std_logic_vector(35 downto 0);
+       signal adc_channels: std_logic_vector(71 downto 0);
+       signal adc_m_count: std_logic_vector(8 downto 0);
        
        signal spiclk_old: std_logic_vector(1 downto 0); --pro detekci hrany SPI hodin
        --signal pwm_in, pwm_dir_in: std_logic;
        signal gpio_clk: std_logic;
        signal dat_reg : STD_LOGIC_VECTOR (127 downto 0); --shift register for spi
        signal position: std_logic_vector(31 downto 0); --pozice z qcounteru
+       signal index_position: std_logic_vector(11 downto 0);           --pozice irc_i
        signal ce0_old: std_logic_vector(1 downto 0);
        
        --pwm signals
@@ -176,6 +179,7 @@ architecture behavioral of rpi_mc_simple_dc is
        signal pwm_sync: std_logic;
        signal pwm_en_p: std_logic_vector(1 to 3);
        signal pwm_en_n: std_logic_vector(1 to 3);
+       signal pwm_sig: std_logic_vector(1 to 3);
        
        signal income_data_valid: std_logic;
        
@@ -232,7 +236,7 @@ begin
                        match => pwm_match(i),
                        count => pwm_count,
                        -- outputs
-                       out_p => pwm(i),                                --positive signal
+                       out_p => pwm_sig(i),                            --positive signal
                        out_n => shdn(i)                                --reverse signal is in shutdown mode
                );
        end generate;
@@ -253,7 +257,8 @@ begin
                adc_channels => adc_channels,
                adc_sclk => adc_sclk,
                adc_scs => adc_scs,
-               adc_mosi => adc_mosi
+               adc_mosi => adc_mosi,
+               measur_count => adc_m_count
                
        );
 
@@ -291,15 +296,16 @@ begin
        rs485_dir <= '0';
 
 
-       --shdn(1) <= '0';
-       --shdn(2) <= '1';
-       --shdn(3) <= '0';
-
-       --pwm(1) <= '0';
-       --pwm(2) <= '0';
-       --pwm(3) <= '0';
+       pwm(1) <= pwm_sig(1) and dip_sw(1);
+       pwm(2) <= pwm_sig(2) and dip_sw(2);
+       pwm(3) <= pwm_sig(3) and dip_sw(3);
        
                
+       process
+       begin
+               wait until (irc_i'event and irc_i='1');
+               index_position(11 downto 0)<=position(11 downto 0);
+       end process;
        
        process
        begin
@@ -345,12 +351,10 @@ begin
                        income_data_valid<='0';
                        dat_reg(127 downto 96) <= position(31 downto 0); --pozice
                        dat_reg(95 downto 93) <= hal_in(1 to 3); --halovy sondy
-                       dat_reg(92 downto 90) <= pwm_en_p(1 to 3); --enable positive
-                       dat_reg(89 downto 87) <= pwm_en_n(1 to 3); --shutdown
-                       dat_reg(86 downto 81) <= pwm_match(1)(10 downto 5); --6 MSb of PWM1
-                       dat_reg(80 downto 74) <= pwm_match(2)(10 downto 4); --7 MSb of PWM2
-                       dat_reg(73 downto 68) <= pwm_match(3)(10 downto 5); --6 MSb of PWM3
-                       dat_reg(67 downto 32) <= adc_channels(35 downto 0); --current mesurments
+                       dat_reg(92 downto 81) <= index_position(11 downto 0);   --position of irc_i
+                       dat_reg(80 downto 72) <=adc_m_count(8 downto 0);        --count of measurments
+                       --data order schould be: ch2 downto ch0 downto ch1
+                       dat_reg(71 downto 0) <= adc_channels(71 downto 0);      --current mesurments
                        adc_reset<='0'; --remove reset flag, and wait on its rising edge
                elsif (ce0_old = "01") then --rising edge of SS, we should read the data
                        adc_reset<='1';