Modified ADC clk frequency from 3.2 MHz to 2.08Mhz

[fpga/rpi-motor-control.git] / pmsm-control / syn.tcl

diff --git a/pmsm-control/syn.tcl b/pmsm-control/syn.tcl
index 1a3a609e68b821ada174560b4dfe1438a608672a..19ab95ad2afbfaf1413efb7e7bff395d3d853d82 100644 (file)
--- a/pmsm-control/syn.tcl
+++ b/pmsm-control/syn.tcl
@@ -8,7 +8,7 @@ add_file util.vhdl
 add_file qcounter.vhdl
 add_file dff.vhdl
 add_file mcpwm.vhdl
-add_file div8.vhdl
+add_file divider.vhdl
 add_file adc_reader.vhdl
 
 # top-level