Current measurment bits transferring via SPI from FPGA to RPi extended from 12 to...

[fpga/rpi-motor-control.git] / pmsm-control / rpi_pmsm_control.vhdl

diff --git a/pmsm-control/rpi_pmsm_control.vhdl b/pmsm-control/rpi_pmsm_control.vhdl
index 9e606752b9089f3cb78bea2ffd76d23e0c6ce2cc..104d2727aa7e5edb9fd20b70bb53517b4b04ae6a 100644 (file)
--- a/pmsm-control/rpi_pmsm_control.vhdl
+++ b/pmsm-control/rpi_pmsm_control.vhdl
@@ -232,7 +232,7 @@ begin
                        match => pwm_match(i),
                        count => pwm_count,
                        -- outputs
-                       out_p => pwm(i),                                --positive signal
+                       out_p => open,--pwm(i),                         --positive signal
                        out_n => shdn(i)                                --reverse signal is in shutdown mode
                );
        end generate;
@@ -347,10 +347,15 @@ begin
                        dat_reg(95 downto 93) <= hal_in(1 to 3); --halovy sondy
                        dat_reg(92 downto 90) <= pwm_en_p(1 to 3); --enable positive
                        dat_reg(89 downto 87) <= pwm_en_n(1 to 3); --shutdown
-                       dat_reg(86 downto 81) <= pwm_match(1)(10 downto 5); --6 MSb of PWM1
-                       dat_reg(80 downto 74) <= pwm_match(2)(10 downto 4); --7 MSb of PWM2
-                       dat_reg(73 downto 68) <= pwm_match(3)(10 downto 5); --6 MSb of PWM3
-                       dat_reg(67 downto 32) <= adc_channels(35 downto 0); --current mesurments
+                       dat_reg(86 downto 81) <= (others=>'0');--pwm_match(1)(10 downto 5); --6 MSb of PWM1
+                       dat_reg(80 downto 74) <= (others=>'0');--pwm_match(2)(10 downto 4); --7 MSb of PWM2
+                       dat_reg(73 downto 68) <= (others=>'0');--pwm_match(3)(10 downto 5); --6 MSb of PWM3
+                       dat_reg(71 downto 60)<=(others=>'0');
+                       dat_reg(59 downto 48) <= adc_channels(35 downto 24); --current mesurments
+                       dat_reg(47 downto 36)<=(others=>'0');
+                       dat_reg(35 downto 24) <= adc_channels(23 downto 12); --current mesurments
+                       dat_reg(23 downto 12)<=(others=>'0');
+                       dat_reg(11 downto 0) <= adc_channels(11 downto 0); --current mesurments
                        adc_reset<='0'; --remove reset flag, and wait on its rising edge
                elsif (ce0_old = "01") then --rising edge of SS, we should read the data
                        adc_reset<='1';