GPCLK frequency from RPi increased from 2Mhz to 50Mhz. To keep clk frequency for...
[fpga/rpi-motor-control.git] / pmsm-control / syn.tcl
1 # synplify_pro -licensetype synplifypro_actel -batch syn.tcl
2
3 project -new rpi_mc_simple_dc
4 impl -name syn0
5
6 #add_file pll50to200.vhd
7 add_file util.vhdl
8 add_file qcounter.vhdl
9 add_file dff.vhdl
10 add_file mcpwm.vhdl
11 add_file div8.vhdl
12
13 # top-level
14 add_file rpi_mc_simple_dc.vhdl
15 #add_file rpi_mc_simple_dc.sdc
16
17 set_option -technology IGLOO
18 set_option -part AGL250V5
19 set_option -package VQFP100
20 set_option -speed_grade std
21
22 set_option -frequency 40.0
23
24 project -run
25 project -save