2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_arith.all;
4 use ieee.std_logic_unsigned.all;
5 use ieee.numeric_std.all;
7 -- D circuit (filtered)
18 architecture behavioral of dff3 is
19 signal d_3r : std_logic;
20 signal d_2r : std_logic;
21 signal d_r : std_logic;
22 signal data_s : std_logic;
25 --potlaceni duplikace klupnych obvodu ve fazi optimalizace
26 --attribute REGISTER_DUPLICATION : string;
27 --attribute REGISTER_DUPLICATION of d_3r : signal is "NO";
28 --attribute REGISTER_DUPLICATION of d_2r : signal is "NO";
29 --attribute REGISTER_DUPLICATION of d_r : signal is "NO";
31 attribute syn_keep : boolean;
32 attribute syn_keep of d_3r : signal is true;
33 attribute syn_keep of d_2r : signal is true;
34 attribute syn_keep of d_r : signal is true;
42 wait until clk_i'event and clk_i = '1';
43 if d_3r = d_2r and d_2r = d_r then