Simple frequency divider replaced with more complex counter.
Added synchronous detection o divided clk signal to adc_reader component.
Correct RPi-MI-1 board name to match PCB text. Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Change license to LGPL and GPLv3+ options, fill authors according their real work on the project. Signed-off-by: Pavel Pisa <ppisa@pikron.com>
Attemp to solve bug. ADC channels association should be pwm1-ch0 pwm2-ch1 pwm3-ch2 (according to schema). In fact it is pwm1-ch1 pwm2-ch2 pwm3-ch0. Cant find the mistake.
Sending unique measured current value was replaced by current accumulator. Now multiple summarised values are sent alongside with its count.
Added ADC reset after each FPGA<->RPi transfer. ADC channels manipulation improved.
ADC reader moved to separate file.