From 1106a765a2571c5bdcc9e62b15263b04fa351f22 Mon Sep 17 00:00:00 2001 From: Marek Peca Date: Tue, 2 Nov 2010 11:27:34 +0100 Subject: [PATCH] silly manual testbench added (now should be makeable) --- qctest.vhdl | 199 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 199 insertions(+) create mode 100644 qctest.vhdl diff --git a/qctest.vhdl b/qctest.vhdl new file mode 100644 index 0000000..00ea793 --- /dev/null +++ b/qctest.vhdl @@ -0,0 +1,199 @@ +-- +-- created by hand&mouse in Xilinx ISE +-- + +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; +use ieee.numeric_std.all; +USE IEEE.STD_LOGIC_TEXTIO.ALL; +USE STD.TEXTIO.ALL; + +ENTITY qctest IS +END qctest; + +ARCHITECTURE testbench_arch OF qctest IS + FILE RESULTS: TEXT OPEN WRITE_MODE IS "results.txt"; + + COMPONENT qcounter + PORT ( + clock : In std_logic; + reset : In std_logic; + a0 : In std_logic; + b0 : In std_logic; + qcount : Out std_logic_vector (31 DownTo 0); + a_rise : Out std_logic; + a_fall : Out std_logic; + b_rise : Out std_logic; + b_fall : Out std_logic; + ab_event : Out std_logic; + ab_error : Out std_logic + ); + END COMPONENT; + + SIGNAL clock : std_logic := '0'; + SIGNAL reset : std_logic := '0'; + SIGNAL a : std_logic := '0'; + SIGNAL b : std_logic := '0'; + SIGNAL qcount : std_logic_vector (31 DownTo 0) := "00000000000000000000000000000000"; + SIGNAL a_rise : std_logic := '0'; + SIGNAL a_fall : std_logic := '0'; + SIGNAL b_rise : std_logic := '0'; + SIGNAL b_fall : std_logic := '0'; + SIGNAL ab_event : std_logic := '0'; + SIGNAL ab_error : std_logic := '0'; + + constant PERIOD : time := 200 ns; + constant DUTY_CYCLE : real := 0.5; + constant OFFSET : time := 100 ns; + + BEGIN + UUT : qcounter + PORT MAP ( + clock => clock, + reset => reset, + a0 => a, + b0 => b, + qcount => qcount, + a_rise => a_rise, + a_fall => a_fall, + b_rise => b_rise, + b_fall => b_fall, + ab_event => ab_event, + ab_error => ab_error + ); + + PROCESS -- clock process for clock + BEGIN + WAIT for OFFSET; + CLOCK_LOOP : LOOP + clock <= '0'; + WAIT FOR (PERIOD - (PERIOD * DUTY_CYCLE)); + clock <= '1'; + WAIT FOR (PERIOD * DUTY_CYCLE); + END LOOP CLOCK_LOOP; + END PROCESS; + + PROCESS + BEGIN + -- ------------- Current Time: 185ns + WAIT FOR 185 ns; + a <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 385ns + WAIT FOR 200 ns; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 585ns + WAIT FOR 200 ns; + a <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 785ns + WAIT FOR 200 ns; + b <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 985ns + WAIT FOR 200 ns; + a <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 1185ns + WAIT FOR 200 ns; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 1385ns + WAIT FOR 200 ns; + a <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 1585ns + WAIT FOR 200 ns; + b <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 1785ns + WAIT FOR 200 ns; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 1985ns + WAIT FOR 200 ns; + a <= '1'; + b <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 2385ns + WAIT FOR 400 ns; + a <= '0'; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 2585ns + WAIT FOR 200 ns; + b <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 2785ns + WAIT FOR 200 ns; + a <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 2985ns + WAIT FOR 200 ns; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 3185ns + WAIT FOR 200 ns; + b <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 3385ns + WAIT FOR 200 ns; + a <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 3585ns + WAIT FOR 200 ns; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 3785ns + WAIT FOR 200 ns; + a <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 3985ns + WAIT FOR 200 ns; + b <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 4185ns + WAIT FOR 200 ns; + a <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 4385ns + WAIT FOR 200 ns; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 4785ns + WAIT FOR 400 ns; + a <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 4985ns + WAIT FOR 200 ns; + b <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 5585ns + WAIT FOR 600 ns; + a <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 5985ns + WAIT FOR 400 ns; + a <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 6385ns + WAIT FOR 400 ns; + a <= '0'; + -- ------------------------------------- + -- ------------- Current Time: 6585ns + WAIT FOR 200 ns; + b <= '1'; + -- ------------------------------------- + -- ------------- Current Time: 6985ns + WAIT FOR 400 ns; + b <= '0'; + -- ------------------------------------- + WAIT FOR 993215 ns; + + END PROCESS; + + END testbench_arch; + -- 2.39.2