Testbench Makefile improved

diff --git a/tb/Makefile b/tb/Makefile
index 18d0314e0e94153a8ddccedf5c9c099bb100a6ac..66b07d0e6fadb4c7cc02a102bcc72c358c305889 100644 (file)
--- a/tb/Makefile
+++ b/tb/Makefile
@@ -1,19 +1,39 @@
-VHDL_MAIN=tb_qcounter
-VHDL_SUB=dff.o qcounter.o
+# Be aware of required VHDL_ENTITIES sequence! All entities must be listed in
+# bottom to up order (e.g. the top entity is the last in this list). Otherwise
+# it won't compile.
+
+# Target 'view' can be used to compile & run testbench and show the result
+# in gtkwave. When lauching gtkwave, timing diagram settings (named after
+# the testbench) is also loaded, so it's possible to store view settings
+# by invoking 'File/Write Save File (Ctrl+S)' in gtkwave.
+
+
+VHDL_MAIN     = tb_qcounter
+VHDL_ENTITIES = dff.o \
+                qcounter.o
+
+STOP_TIME     = 8us
+
+##############################################################################
 
 all: $(VHDL_MAIN)
 
 run: $(VHDL_MAIN)
-       ghdl -r $< --stop-time=8us --vcd=$<.vcd
+       ghdl -r $< --stop-time=$(STOP_TIME) --vcd=$<.vcd
+
+view: run
+       gtkwave $(VHDL_MAIN).vcd $(VHDL_MAIN).sav
+
+$(VHDL_MAIN): $(VHDL_ENTITIES) $(VHDL_MAIN).o
+       ghdl -e -fexplicit --ieee=synopsys $@
 
-$(VHDL_MAIN): $(VHDL_MAIN).o $(VHDL_SUB)
-       ghdl -e --ieee=synopsys $@
 
 %.o: %.vhd
-       ghdl -a --ieee=synopsys $<
+       ghdl -a -fexplicit --ieee=synopsys $<
 
 %.o: ../%.vhd
-       ghdl -a --ieee=synopsys $<
+       ghdl -a -fexplicit --ieee=synopsys $<
 
 clean:
-       rm -Rf *.o qctest
+       rm -Rf *.o *.vcd $(VHDL_MAIN) results.txt work-obj93.cf
+