X-Git-Url: https://rtime.felk.cvut.cz/gitweb/fpga/lx-cpu1/tumbl.git/blobdiff_plain/342b65f43eca19d8169829aa8d342d1424c6d323..b7529be7741c46ef603ef0e487642a065f3a998a:/hw/mbl_Pkg.vhd diff --git a/hw/mbl_Pkg.vhd b/hw/mbl_Pkg.vhd index 48e1162..a54495b 100644 --- a/hw/mbl_Pkg.vhd +++ b/hw/mbl_Pkg.vhd @@ -252,7 +252,9 @@ PACKAGE mbl_Pkg IS ID2EX_o : OUT ID2EX_Type; -- INT_CTRL_i : IN INT_CTRL_Type; - ID2CTRL_o : OUT ID2CTRL_Type + ID2CTRL_o : OUT ID2CTRL_Type; + -- + noLiteOpc_s : OUT STD_LOGIC ); END COMPONENT; @@ -328,7 +330,7 @@ PACKAGE mbl_Pkg IS PORT ( clk_i : IN STD_LOGIC; rst_i : IN STD_LOGIC; - -- halt_i : IN STD_LOGIC; + halt_i : IN STD_LOGIC; int_i : IN STD_LOGIC; -- specific fetch i/o imem_addr_o : OUT STD_LOGIC_VECTOR (31 DOWNTO 0); @@ -412,6 +414,10 @@ PACKAGE mbl_Pkg IS VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0); VARIABLE co : OUT STD_LOGIC ); + PROCEDURE ep_add32nc ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0); + ci : IN STD_LOGIC; + VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0)); + -- PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR; ci : IN STD_LOGIC; -- VARIABLE s : OUT STD_LOGIC_VECTOR; -- VARIABLE co : OUT STD_LOGIC ); @@ -451,6 +457,29 @@ PACKAGE BODY mbl_Pkg IS END IF; END PROCEDURE; + PROCEDURE ep_add32nc ( a, b : IN STD_LOGIC_VECTOR (31 DOWNTO 0); + ci : IN STD_LOGIC; + VARIABLE s : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) ) IS + + CONSTANT NBITS_LO_c : POSITIVE := 17; + CONSTANT NBITS_HI_c : POSITIVE := 32 -NBITS_LO_c; + VARIABLE tmp_lo_v : STD_LOGIC_VECTOR (NBITS_LO_c +1 DOWNTO 0); + VARIABLE tmp_hi0_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0); + VARIABLE tmp_hi1_v : STD_LOGIC_VECTOR (NBITS_HI_c +1 DOWNTO 0); + BEGIN + tmp_lo_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(NBITS_LO_c -1 DOWNTO 0) & '1' ) + + UNSIGNED( '0' & b(NBITS_LO_c -1 DOWNTO 0) & ci )); + tmp_hi0_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') + + UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '0')); + tmp_hi1_v := STD_LOGIC_VECTOR( UNSIGNED( '0' & a(31 DOWNTO (32 - NBITS_HI_c)) & '1') + + UNSIGNED( '0' & b(31 DOWNTO (32 - NBITS_HI_c)) & '1')); + IF (tmp_lo_v(NBITS_LO_c +1) = '0') THEN + s := tmp_hi0_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1); + ELSE + s := tmp_hi1_v(NBITS_HI_c DOWNTO 1) & tmp_lo_v(NBITS_LO_c DOWNTO 1); + END IF; + END PROCEDURE; + -- PROCEDURE ep_add32 ( a, b : IN STD_LOGIC_VECTOR; ci : IN STD_LOGIC; -- VARIABLE s : OUT STD_LOGIC_VECTOR; -- VARIABLE co : OUT STD_LOGIC ) IS