MEM_WRB_o.wrb_Action <= MEM_REG_i.wrb_Action;
MEM_WRB_o.wrix_rD <= MEM_REG_i.wrix_rD;
-- also signal 'slow memory decices' and interrupts from devices
- MEM2CTRL_o.clken <= DMEMB_i.clken;
+ MEM2CTRL_o.bus_taken <= '0' WHEN EX2MEM_i.mem_Action = NO_MEM ELSE DMEMB_i.bus_taken;
+ MEM2CTRL_o.bus_wait <= '0' WHEN EX2MEM_i.mem_Action = NO_MEM ELSE DMEMB_i.bus_wait;
MEM2CTRL_o.int <= DMEMB_i.int;
p_mem:
WHEN OTHERS => dmem_data_v := DMEMB_i.data;
END CASE;
+ MEM2CTRL_o.read_data <= dmem_data_v;
+ MEM2CTRL_o.need_keep <= '0';
+
-- output to dmem-bus
CASE EX2MEM_i.mem_Action IS
WHEN OTHERS =>
-- forward mem_data just read, to handle e.g. lhu rD,mem[x]; sh rD,mem[y]; ...
exeq_data_v := dmem_data_v;
+ MEM2CTRL_o.need_keep <= '1';
END CASE;
ELSE
exeq_data_v := EX2MEM_i.data_rD;