From 40f33e01417f630149dfe34d2cdb7b40c1645ac4 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Fri, 24 Apr 2015 00:00:42 +0200 Subject: [PATCH] RoCoN: implement code to setup FPGA and Tumbl from SPI Flash. Signed-off-by: Pavel Pisa --- sw/app/rocon/appl_main.c | 74 ++++++++++++++++++++++++++++++++++++++++ sw/app/rocon/appl_pxmc.c | 33 ++++++++++++++++++ sw/app/rocon/appl_pxmc.h | 2 ++ 3 files changed, 109 insertions(+) diff --git a/sw/app/rocon/appl_main.c b/sw/app/rocon/appl_main.c index c7a146a..ac19240 100644 --- a/sw/app/rocon/appl_main.c +++ b/sw/app/rocon/appl_main.c @@ -273,6 +273,73 @@ static void register_logdomains(void) } +/***********************************/ +// Load FPGA configuration from SPI Flash + +#ifdef CONFIG_OC_MTD_DRV_SYSLESS +int fpga_load_config_from_flash(void) +{ + uint32_t size; + char *magic; + void *fpga_data = (void*)FPGA_CONFIGURATION_FILE_ADDRESS; + uint32_t fpga_flash_addr = 0x4000; + int res; + uint32_t tumbl_flash_addr = 0x2000; + uint32_t tumbl_flash_size = 0x0800; + uint32_t u; + + res = mtd_spi_read(&mtd_spi_state, fpga_data, 8, fpga_flash_addr, 0); + if (res < 0) + return res; + + magic = (char *)fpga_data; + if (magic[0] != 'F' || magic[1] != 'P' || magic[2] != 'G' || magic[3] != 'A') + { + return 0; + } + + size = *(uint32_t *)(fpga_data + 4); + if (size > 512 * 1024) { + return -8; + } + + res = mtd_spi_read(&mtd_spi_state, fpga_data, 8 + size, fpga_flash_addr, 0); + if (res < 0) + return res; + + res = fpga_configure(); + if (res != FPGA_CONF_SUCESS) + return -100 - res; + + res = mtd_spi_read(&mtd_spi_state, fpga_data, tumbl_flash_size, + tumbl_flash_addr, 0); + if (res < 0) + return res; + + if ((*(uint32_t *)(fpga_data) == 0x00000000) || + (*(uint32_t *)(fpga_data) == 0xffffffff)) + return 2; + + fpga_tumbl_set_reset(1); + + for (u = 0; u < 0x1000 >> 2; u++) + fpga_tumbl_dmem[u] = 0; + + fpga_tumbl_write(0, (unsigned char *)fpga_data, tumbl_flash_size); + + fpga_tumbl_set_reset(0); + + #ifdef WATCHDOG_ENABLED + watchdog_feed(); + #endif /* WATCHDOG_ENABLED */ + + if (pxmcc_curadc_zero(1) < 0) + return -200; + + return 1; +} +#endif + /***********************************/ int main() { @@ -487,6 +554,13 @@ int main() appl_run_at_slow_sfi_setup(); appl_run_at_fast_sfi_setup(); + /***********************************/ + // Load FPGA configuration +#ifdef CONFIG_OC_MTD_DRV_SYSLESS + i = fpga_load_config_from_flash(); + printf("fpga_load_config_from_flash %d\n", i); +#endif + #ifdef APPL_WITH_AUX_IO aux_out_set_init_val(); #endif /*APPL_WITH_AUX_IO*/ diff --git a/sw/app/rocon/appl_pxmc.c b/sw/app/rocon/appl_pxmc.c index 8d583a0..1985785 100644 --- a/sw/app/rocon/appl_pxmc.c +++ b/sw/app/rocon/appl_pxmc.c @@ -1291,6 +1291,39 @@ int pxmcc_axis_setup(pxmc_state_t *mcs, int mode) return 0; } +int pxmcc_curadc_zero(int wait) +{ + int chan; + unsigned try = wait? 200: 0; + volatile pxmcc_data_t *mcc_data = pxmc_rocon_mcc_data(); + volatile pxmcc_curadc_data_t *curadc; + + for (chan = 0; chan < PXMCC_CURADC_CHANNELS; chan++) + pxmc_rocon_pwm_direct_wr(chan, 0, 0); + + do { + if (mcc_data->common.fwversion == PXMCC_FWVERSION) + break; + if (!try--) + return -1; + } while(1); + + if (wait) { + if (pxmc_rocon_wait_rx_done() < 0) + return -1; + + if (pxmc_rocon_wait_rx_done() < 0) + return -1; + } + + for (chan = 0; chan < PXMCC_CURADC_CHANNELS; chan++) { + curadc = mcc_data->curadc + chan; + curadc->siroladc_offs += curadc->cur_val; + } + + return 0; +} + /*******************************************************************/ volatile void *pxmc_rocon_rx_data_hist_buff; diff --git a/sw/app/rocon/appl_pxmc.h b/sw/app/rocon/appl_pxmc.h index 215b747..2b68cbe 100644 --- a/sw/app/rocon/appl_pxmc.h +++ b/sw/app/rocon/appl_pxmc.h @@ -44,4 +44,6 @@ extern unsigned pxmc_rocon_lxpwr_chips; int pxmc_rocon_pwm_direct_wr(unsigned chan, unsigned pwm, int en); +int pxmc_rocon_wait_rx_done(void); + #endif /*_APPL_PXMC_H_*/ -- 2.39.2