2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_arith.all;
4 use ieee.std_logic_unsigned.all;
5 use ieee.numeric_std.all;
24 -- Data bus (read only)
25 data_out : out std_logic_vector(31 downto 0);
33 architecture Behavioral of bus_bcd is
35 signal value : std_logic_vector(31 downto 0);
47 value : out std_logic_vector((width-1) downto 0)
66 memory_bus: process(ce, rd, value)
71 data_out <= (others => 'X');
73 if ce = '0' and rd = '0' then