]> rtime.felk.cvut.cz Git - fpga/lx-cpu1/gcc-tumbl.git/blobdiff - libgcc/config/mbtumbl/moddi3.S
MBTumbl: Add back support for delay bit and fix new linking
[fpga/lx-cpu1/gcc-tumbl.git] / libgcc / config / mbtumbl / moddi3.S
index 8419c80a9b42e7a9558a7c08b262afaae03b1c76..2082a047a1c80f2284e51b285dcc220a351a617f 100644 (file)
@@ -46,11 +46,11 @@ __moddi3:
 
 #Check for Zero Value in the divisor/dividend
        OR      r9,r5,r6                        # Check for the op1 being zero
-       BEQI    r9,$LaResult_Is_Zero            # Result is zero
+       BEQID   r9,$LaResult_Is_Zero            # Result is zero
        OR      r9,r7,r8                        # Check for the dividend being zero
        BEQI    r9,$LaDiv_By_Zero               # Div_by_Zero   # Division Error
+       BGEId   r5,$La1_Pos 
        XOR     r27,r5,r7                       # Get the sign of the result
-       BGEI    r5,$La1_Pos 
        RSUBI   r6,r6,0                         # Make dividend positive
        RSUBIC  r5,r5,0                         # Make dividend positive
 $La1_Pos:
@@ -67,8 +67,8 @@ $La2_Pos:
 $LaDIV1:
        ADD     r6,r6,r6
        ADDC    r5,r5,r5                        # left shift logical r5
+       BGEID   r5,$LaDIV1                      
        ADDIK   r28,r28,-1
-       BGEI    r5,$LaDIV1                      
 $LaDIV2:
        ADD     r6,r6,r6
        ADDC    r5,r5,r5        # left shift logical r5/r6 get the '1' into the Carry
@@ -109,7 +109,7 @@ $LaRETURN_HERE:
        lwi     r28,r1,12
        lwi     r29,r1,16
        lwi     r30,r1,20
+       rtsd    r15,4
        addik r1,r1,24
-       rts     r15,4
         .end __moddi3