MBTumbl: Patch libgcc - config and no delay bit

[fpga/lx-cpu1/gcc-tumbl.git] / libgcc / config / mbtumbl / divsi3.S

diff --git a/libgcc/config/mbtumbl/divsi3.S b/libgcc/config/mbtumbl/divsi3.S
index f3b7a1983066dd9e4356a5d7c75f1029bab3d693..9518c0ecfb388bd8a8d300e71437e0e4e88c69f4 100644 (file)
--- a/libgcc/config/mbtumbl/divsi3.S
+++ b/libgcc/config/mbtumbl/divsi3.S
@@ -45,9 +45,9 @@ __divsi3:
        SWI     r31,r1,12
 
        BEQI    r6,$LaDiv_By_Zero       # Div_by_Zero   # Division Error
-       BEQI    r5,$LaResult_Is_Zero    # Result is Zero 
-       BGEID   r5,$LaR5_Pos 
+       BEQI    r5,$LaResult_Is_Zero    # Result is Zero
        XOR     r28,r5,r6               # Get the sign of the result
+       BGEI    r5,$LaR5_Pos 
        RSUBI   r5,r5,0                 # Make r5 positive
 $LaR5_Pos:
        BGEI    r6,$LaR6_Pos
@@ -62,8 +62,8 @@ $LaDIV0:
         BLTI    r5,$LaDIV2              # This traps r5 == 0x80000000 
 $LaDIV1:
        ADD     r5,r5,r5                # left shift logical r5
-       BGTID   r5,$LaDIV1       
        ADDIK   r29,r29,-1
+       BGTI    r5,$LaDIV1       
 $LaDIV2:
        ADD     r5,r5,r5                # left shift logical  r5 get the '1' into the Carry
        ADDC    r30,r30,r30             # Move that bit into the Mod register
@@ -78,8 +78,8 @@ $LaMOD_TOO_SMALL:
        BRI     $LaDIV2                 # Div2
 $LaLOOP_END:
        BGEI    r28,$LaRETURN_HERE
-       BRID    $LaRETURN_HERE
        RSUBI   r3,r3,0                 # Negate the result
+       BRI     $LaRETURN_HERE
 $LaDiv_By_Zero:
 $LaResult_Is_Zero:
        OR      r3,r0,r0 # set result to 0
@@ -89,8 +89,8 @@ $LaRETURN_HERE:
        LWI     r29,r1,4
        LWI     r30,r1,8
        LWI     r31,r1,12
-       RTSD    r15,8
        ADDIK   r1,r1,16
+       RTS     r15,4
 .end __divsi3
        .size   __divsi3, . - __divsi3