return (strdup (tmpstr));
}
+#ifndef ARCH_mbtumbl
+
static char *
get_field_rfsl (long instr)
{
return (strdup (tmpstr));
}
+#endif
+
static char *
get_field_special (long instr, struct op_code_struct * op)
{
case REG_PC_MASK :
strcpy (spr, "pc");
break;
+#ifndef ARCH_mbtumbl
case REG_EAR_MASK :
strcpy (spr, "ear");
break;
else
strcpy (spr, "pc");
break;
+#else
+ default :
+ strcpy (spr, "pc");
+ break;
}
+#endif
sprintf (tmpstr, "%s%s", register_prefix, spr);
return (strdup (tmpstr));
print_func (stream, "\t%s, %s, %s", get_field_rd (inst),
get_field_r1(inst), get_field_imm5 (inst));
break;
+#ifndef ARCH_mbtumbl
case INST_TYPE_RD_RFSL:
print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_rfsl (inst));
break;
case INST_TYPE_R1_RFSL:
print_func (stream, "\t%s, %s", get_field_r1 (inst), get_field_rfsl (inst));
break;
+#endif
case INST_TYPE_RD_SPECIAL:
print_func (stream, "\t%s, %s", get_field_rd (inst),
get_field_special (inst, op));
case INST_TYPE_RD_R1_SPECIAL:
print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_r2 (inst));
break;
+#ifndef ARCH_mbtumbl
case INST_TYPE_RD_IMM15:
print_func (stream, "\t%s, %s", get_field_rd (inst), get_field_imm15 (inst));
break;
case INST_TYPE_RFSL:
print_func (stream, "\t%s", get_field_rfsl (inst));
break;
+#endif
default:
/* If the disassembler lags the instruction set. */
print_func (stream, "\tundecoded operands, inst is 0x%04x", (unsigned int) inst);