MBTumbl: More constraints

[fpga/lx-cpu1/binutils-tumbl.git] / gas / config / tc-microblaze.c

diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
index 3ab854fef708723911bfb10753a5eb7460b06b68..327a70b59fd678166553050a7ec605335d8fecc8 100644 (file)
--- a/gas/config/tc-microblaze.c
+++ b/gas/config/tc-microblaze.c
@@ -418,6 +418,7 @@ parse_reg (char * s, unsigned * reg)
       *reg = REG_MSR;
       return s + 4;
     }
+#ifndef ARCH_mbtumbl
   else if (strncasecmp (s, "rear", 4) == 0)
     {
       *reg = REG_EAR;
@@ -528,6 +529,7 @@ parse_reg (char * s, unsigned * reg)
        }
       return s;
     }
+#endif
   else
     {
       if (TOLOWER (s[0]) == 'r')
@@ -752,12 +754,15 @@ static bfd_boolean
 check_spl_reg (unsigned * reg)
 {
   if ((*reg == REG_MSR)   || (*reg == REG_PC)
+#ifndef ARCH_mbtumbl
       || (*reg == REG_EAR)   || (*reg == REG_ESR)
       || (*reg == REG_FSR)   || (*reg == REG_BTR) || (*reg == REG_EDR)
       || (*reg == REG_PID)   || (*reg == REG_ZPR)
       || (*reg == REG_TLBX)  || (*reg == REG_TLBLO)
       || (*reg == REG_TLBHI) || (*reg == REG_TLBSX)
-      || (*reg >= REG_PVR+MIN_PVR_REGNUM && *reg <= REG_PVR+MAX_PVR_REGNUM))
+      || (*reg >= REG_PVR+MIN_PVR_REGNUM && *reg <= REG_PVR+MAX_PVR_REGNUM)
+#endif
+  )
     return TRUE;
 
   return FALSE;
@@ -1040,7 +1045,10 @@ md_assemble (char * str)
         as_fatal (_("Cannot use special register with this instruction"));
 
       if (exp.X_op != O_constant)
+      {
         as_warn (_("Symbol used as immediate for shift instruction"));
+        immed = 0;
+      }
       else
        {
           output = frag_more (isize);
@@ -1111,6 +1119,7 @@ md_assemble (char * str)
       output = frag_more (isize);
       break;
 
+#ifndef ARCH_mbtumbl
     case INST_TYPE_RD_RFSL:
       if (strcmp (op_end, ""))
         op_end = parse_reg (op_end + 1, &reg1);  /* Get rd.  */
@@ -1204,6 +1213,7 @@ md_assemble (char * str)
       inst |= (immed << IMM_LOW) & RFSL_MASK;
       output = frag_more (isize);
       break;
+#endif
 
     case INST_TYPE_R1:
       if (strcmp (op_end, ""))
@@ -1223,6 +1233,7 @@ md_assemble (char * str)
       break;
 
       /* For tuqula insn...:) */
+#ifndef ARCH_mbtumbl
     case INST_TYPE_RD:
       if (strcmp (op_end, ""))
         op_end = parse_reg (op_end + 1, &reg1);  /* Get rd.  */
@@ -1239,6 +1250,7 @@ md_assemble (char * str)
       inst |= (reg1 << RD_LOW) & RD_MASK;
       output = frag_more (isize);
       break;
+#endif
 
     case INST_TYPE_RD_SPECIAL:
       if (strcmp (op_end, ""))
@@ -1260,6 +1272,7 @@ md_assemble (char * str)
         immed = opcode->immval_mask | REG_MSR_MASK;
       else if (reg2 == REG_PC)
         immed = opcode->immval_mask | REG_PC_MASK;
+#ifndef ARCH_mbtumbl
       else if (reg2 == REG_EAR)
         immed = opcode->immval_mask | REG_EAR_MASK;
       else if (reg2 == REG_ESR)
@@ -1282,6 +1295,7 @@ md_assemble (char * str)
         immed = opcode->immval_mask | REG_TLBHI_MASK;
       else if (reg2 >= (REG_PVR+MIN_PVR_REGNUM) && reg2 <= (REG_PVR+MAX_PVR_REGNUM))
        immed = opcode->immval_mask | REG_PVR_MASK | reg2;
+#endif
       else
         as_fatal (_("invalid value for special purpose register"));
       inst |= (reg1 << RD_LOW) & RD_MASK;
@@ -1309,6 +1323,7 @@ md_assemble (char * str)
         immed = opcode->immval_mask | REG_MSR_MASK;
       else if (reg1 == REG_PC)
         immed = opcode->immval_mask | REG_PC_MASK;
+#ifndef ARCH_mbtumbl
       else if (reg1 == REG_EAR)
         immed = opcode->immval_mask | REG_EAR_MASK;
       else if (reg1 == REG_ESR)
@@ -1331,6 +1346,7 @@ md_assemble (char * str)
         immed = opcode->immval_mask | REG_TLBHI_MASK;
       else if (reg1 == REG_TLBSX)
         immed = opcode->immval_mask | REG_TLBSX_MASK;
+#endif
       else
         as_fatal (_("invalid value for special purpose register"));
       inst |= (reg2 << RA_LOW) & RA_MASK;