]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/blobdiff - arch/arm/mach-omap2/clock36xx.c
Merge tag 'pm-merge' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[can-eth-gw-linux.git] / arch / arm / mach-omap2 / clock36xx.c
index 0e1e9e4e2fa43e7b51fb921f6d5f222999f75f36..8f3bf4e509082fad0dcb412a0a21573b68e4a485 100644 (file)
  * (Any other value different from the Read value) to the
  * corresponding CM_CLKSEL register will refresh the dividers.
  */
-static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
+int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
 {
+       struct clk_hw_omap *parent;
+       struct clk_hw *parent_hw;
        u32 dummy_v, orig_v, clksel_shift;
        int ret;
 
        /* Clear PWRDN bit of HSDIVIDER */
        ret = omap2_dflt_clk_enable(clk);
 
+       parent_hw = __clk_get_hw(__clk_get_parent(clk->clk));
+       parent = to_clk_hw_omap(parent_hw);
+
        /* Restore the dividers */
        if (!ret) {
-               clksel_shift = __ffs(clk->parent->clksel_mask);
-               orig_v = __raw_readl(clk->parent->clksel_reg);
+               clksel_shift = __ffs(parent->clksel_mask);
+               orig_v = __raw_readl(parent->clksel_reg);
                dummy_v = orig_v;
 
                /* Write any other value different from the Read value */
                dummy_v ^= (1 << clksel_shift);
-               __raw_writel(dummy_v, clk->parent->clksel_reg);
+               __raw_writel(dummy_v, parent->clksel_reg);
 
                /* Write the original divider */
-               __raw_writel(orig_v, clk->parent->clksel_reg);
+               __raw_writel(orig_v, parent->clksel_reg);
        }
 
        return ret;
 }
-
-const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = {
-       .enable         = omap36xx_pwrdn_clk_enable_with_hsdiv_restore,
-       .disable        = omap2_dflt_clk_disable,
-       .find_companion = omap2_clk_dflt_find_companion,
-       .find_idlest    = omap2_clk_dflt_find_idlest,
-};