]> rtime.felk.cvut.cz Git - can-eth-gw-linux.git/blobdiff - arch/arm/boot/dts/imx6q.dtsi
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[can-eth-gw-linux.git] / arch / arm / boot / dts / imx6q.dtsi
index 6dfeaedef3077dd8732f659c764f67b7f0cb4a03..d6265ca971190b06b2217199d4d98321ddb2d6d8 100644 (file)
                        };
 
                        pwm1: pwm@02080000 {
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x02080000 0x4000>;
                                interrupts = <0 83 0x04>;
+                               clocks = <&clks 62>, <&clks 145>;
+                               clock-names = "ipg", "per";
                        };
 
                        pwm2: pwm@02084000 {
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x02084000 0x4000>;
                                interrupts = <0 84 0x04>;
+                               clocks = <&clks 62>, <&clks 146>;
+                               clock-names = "ipg", "per";
                        };
 
                        pwm3: pwm@02088000 {
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x02088000 0x4000>;
                                interrupts = <0 85 0x04>;
+                               clocks = <&clks 62>, <&clks 147>;
+                               clock-names = "ipg", "per";
                        };
 
                        pwm4: pwm@0208c000 {
+                               #pwm-cells = <2>;
+                               compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
                                reg = <0x0208c000 0x4000>;
                                interrupts = <0 86 0x04>;
+                               clocks = <&clks 62>, <&clks 148>;
+                               clock-names = "ipg", "per";
                        };
 
                        can1: flexcan@02090000 {
                                                        66  0x1b0b0     /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */
                                                        70  0x1b0b0     /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */
                                                        48  0x1b0b0     /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */
+                                                       1033 0x4001b0a8 /* MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT*/
                                                >;
                                        };
 
                                compatible = "fsl,imx6q-fec";
                                reg = <0x02188000 0x4000>;
                                interrupts = <0 118 0x04 0 119 0x04>;
-                               clocks = <&clks 117>, <&clks 117>;
-                               clock-names = "ipg", "ahb";
+                               clocks = <&clks 117>, <&clks 117>, <&clks 177>;
+                               clock-names = "ipg", "ahb", "ptp";
                                status = "disabled";
                        };
 
                                status = "disabled";
                        };
                };
+
+               ipu1: ipu@02400000 {
+                       #crtc-cells = <1>;
+                       compatible = "fsl,imx6q-ipu";
+                       reg = <0x02400000 0x400000>;
+                       interrupts = <0 6 0x4 0 5 0x4>;
+                       clocks = <&clks 130>, <&clks 131>, <&clks 132>;
+                       clock-names = "bus", "di0", "di1";
+               };
+
+               ipu2: ipu@02800000 {
+                       #crtc-cells = <1>;
+                       compatible = "fsl,imx6q-ipu";
+                       reg = <0x02800000 0x400000>;
+                       interrupts = <0 8 0x4 0 7 0x4>;
+                       clocks = <&clks 133>, <&clks 134>, <&clks 137>;
+                       clock-names = "bus", "di0", "di1";
+               };
        };
 };