X-Git-Url: https://rtime.felk.cvut.cz/gitweb/arc.git/blobdiff_plain/07bbcb79799c461e4dc58be060a0c3e01f466c97..670aeff4a2ae2f7b626e1febbc86528c0fae0959:/boards/ti_tms570ls/examples/tms570_hdk_can/config/Mcu_Cfg.c

diff --git a/boards/ti_tms570ls/examples/tms570_hdk_can/config/Mcu_Cfg.c b/boards/ti_tms570ls/examples/tms570_hdk_can/config/Mcu_Cfg.c
new file mode 100644
index 00000000..0db1719d
--- /dev/null
+++ b/boards/ti_tms570ls/examples/tms570_hdk_can/config/Mcu_Cfg.c
@@ -0,0 +1,48 @@
+/*
+* Configuration of module: Mcu (Mcu_Cfg.c)
+*
+* Created by:              
+* Copyright:               
+*
+* Configured for (MCU):    TMS570
+*
+* Module vendor:           ArcCore
+* Generator version:       2.0.3
+*
+* Generated by Arctic Studio (http://arccore.com) 
+*/
+
+
+#ifndef MCU_CFG_C_
+#define MCU_CFG_C_
+
+#include "Mcu.h"
+
+
+Mcu_RamSectorSettingConfigType Mcu_RamSectorSettingConfigData[] = {
+};
+
+Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =
+{
+  {
+	.McuClockReferencePointFrequency = 16000000UL,	// try 160000000UL
+	.Pll1    = 4, // REFCLKDIV
+	.Pll2    = 100,   // PLLMULT
+	.Pll3    = 2,     // ODPLL
+	.Pll4    = 2,    // PLLDIV	// try 4
+  },
+};
+
+
+const Mcu_ConfigType McuConfigData[] = {
+  {
+	.McuClockSrcFailureNotification = 0,
+	.McuRamSectors = MCU_NBR_OF_RAM_SECTIONS,
+	.McuClockSettings = 1,
+	.McuDefaultClockSettings = 0,
+	.McuClockSettingConfig = &Mcu_ClockSettingConfigData[0],
+	.McuRamSectorSettingConfig = &Mcu_RamSectorSettingConfigData[0],
+  }
+};
+
+#endif /*MCU_CFG_C_*/