#include "Det.h"\r
#if defined(USE_KERNEL)\r
#include "Os.h"\r
-#include "int_ctrl.h"\r
+#include "irq.h"\r
#endif\r
\r
\r
\r
// Connect interrupt to correct isr\r
TaskType tid;\r
- tid = Os_CreateIsr(Adc_Group0ConversionComplete,6/*prio*/,"DMA1");\r
- IntCtrl_AttachIsr2(tid,NULL, DMA1_Channel1_IRQn);\r
+ tid = Os_Arc_CreateIsr(Adc_Group0ConversionComplete,6/*prio*/,"DMA1");\r
+ Irq_AttachIsr2(tid,NULL, DMA1_Channel1_IRQn);\r
\r
/* Enable DMA1 channel1 */\r
DMA_Cmd(DMA1_Channel1, ENABLE);\r
\r
#if defined(USE_KERNEL)\r
TaskType tid;\r
- tid = Os_CreateIsr(Adc_EQADCError,EQADC_FISR_OVER_PRIORITY,"Adc_Err");\r
- IntCtrl_AttachIsr2(tid,NULL,EQADC_FISR_OVER);\r
+ tid = Os_Arc_CreateIsr(Adc_EQADCError,EQADC_FISR_OVER_PRIORITY,"Adc_Err");\r
+ Irq_AttachIsr2(tid,NULL,EQADC_FISR_OVER);\r
\r
- tid = Os_CreateIsr(Adc_Group0ConversionComplete,EQADC_FIFO0_END_OF_QUEUE_PRIORITY,"Adc_Grp0");\r
- IntCtrl_AttachIsr2(tid,NULL,EQADC_FISR0_EOQF0);\r
+ tid = Os_Arc_CreateIsr(Adc_Group0ConversionComplete,EQADC_FIFO0_END_OF_QUEUE_PRIORITY,"Adc_Grp0");\r
+ Irq_AttachIsr2(tid,NULL,EQADC_FISR0_EOQF0);\r
\r
- tid = Os_CreateIsr(Adc_Group1ConversionComplete,EQADC_FIFO1_END_OF_QUEUE_PRIORITY,"Adc_Grp1");\r
- IntCtrl_AttachIsr2(tid,NULL,EQADC_FISR1_EOQF1);\r
+ tid = Os_Arc_CreateIsr(Adc_Group1ConversionComplete,EQADC_FIFO1_END_OF_QUEUE_PRIORITY,"Adc_Grp1");\r
+ Irq_AttachIsr2(tid,NULL,EQADC_FISR1_EOQF1);\r
\r
#else\r
- IntCtrl_InstallVector (Adc_EQADCError,\r
+ Irq_InstallVector (Adc_EQADCError,\r
EQADC_FISR_OVER,\r
EQADC_FISR_OVER_PRIORITY, CPU_Z1);\r
\r
- IntCtrl_InstallVector (Adc_Group0ConversionComplete,\r
+ Irq_InstallVector (Adc_Group0ConversionComplete,\r
EQADC_FISR0_EOQF0,\r
EQADC_FIFO0_END_OF_QUEUE_PRIORITY, CPU_Z1);\r
\r
- IntCtrl_InstallVector (Adc_Group1ConversionComplete,\r
+ Irq_InstallVector (Adc_Group1ConversionComplete,\r
EQADC_FISR1_EOQF1,\r
EQADC_FIFO1_END_OF_QUEUE_PRIORITY, CPU_Z1);\r
\r