#define SPR_PIR 286\r
#define SPR_PVR 287\r
\r
-#define CORE_PVR_E200Z1 0x81440000UL\r
-#define CORE_PVR_E200Z0 0x81710000UL\r
-#define CORE_PVR_E200Z6 0x81170000UL\r
+#define CORE_PVR_E200Z1 0x81440000UL\r
+#define CORE_PVR_E200Z0 0x81710000UL
+#define CORE_PVR_E200Z3 0x81120000UL\r
+#define CORE_PVR_E200Z6 0x81170000UL\r
\r
\r
typedef struct {\r
{\r
.name = "MPC5516",\r
.pvr = CORE_PVR_E200Z0,\r
- },\r
+ },
#elif defined(CFG_MPC5567)\r
{\r
.name = "MPC5567",\r
.pvr = CORE_PVR_E200Z6,\r
- }\r
+ }
+#elif defined(CFG_MPC5633)
+ {
+ .name = "MPC563X",
+ .pvr = CORE_PVR_E200Z3,
+ },
#endif\r
};\r
\r
{\r
.name = "CORE_E200Z6",\r
.pvr = CORE_PVR_E200Z6,\r
- }\r
+ }
+#elif defined(CFG_MPC5633)
+ {
+ .name = "CORE_E200Z3",
+ .pvr = CORE_PVR_E200Z3,
+ },\r
#endif\r
};\r
\r
* System clock calculation\r
*\r
* 5516 - f_sys = extal * (emfd+16) / ( (eprediv+1) * ( erfd+1 ));\r
- * 5567 - f_sys = extal * (emfd+4) / ( (eprediv+1) * ( 2^erfd ));\r
+ * 5567 - f_sys = extal * (emfd+4) / ( (eprediv+1) * ( 2^erfd ));
+ * 563x - We run in legacy mode = 5567
*/\r
#if defined(CFG_MPC5516)\r
uint32_t eprediv = FMPLL.ESYNCR1.B.EPREDIV;\r
uint32_t emfd = FMPLL.ESYNCR1.B.EMFD;\r
uint32_t erfd = FMPLL.ESYNCR2.B.ERFD;\r
-#elif defined(CFG_MPC5554) || defined(CFG_MPC5567)\r
+#elif defined(CFG_MPC5554) || defined(CFG_MPC5567) || defined(CFG_MPC5633)\r
uint32_t eprediv = FMPLL.SYNCR.B.PREDIV;\r
uint32_t emfd = FMPLL.SYNCR.B.MFD;\r
uint32_t erfd = FMPLL.SYNCR.B.RFD;\r
uint32_t f_sys;\r
uint32 extal = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePoint;\r
\r
- f_sys = CALC_SYSTEM_CLOCK(extal,emfd,eprediv,erfd);\r
+ f_sys = CALC_SYSTEM_CLOCK(extal,emfd,eprediv,erfd);
\r
return f_sys;\r
}\r