\r
#if defined(CFG_MPC5516) || defined(CFG_MPC5517) || defined(CFG_MPC5668) || defined(CFG_MPC5567)\r
#define SPI_CONTROLLER_TOTAL_CNT 4\r
-#elif defined(CFG_MPC560XB)\r
+#elif defined(CFG_MPC5606B)\r
+#define SPI_CONTROLLER_TOTAL_CNT 6\r
+#elif defined(CFG_MPC5604B)\r
#define SPI_CONTROLLER_TOTAL_CNT 3\r
#elif defined(CFG_MPC560X)\r
#define SPI_CONTROLLER_TOTAL_CNT 2\r
#if defined(CFG_MPC560XB)\r
#define DSPI_C_ISR_EOQF DSPI_2_ISR_EOQF\r
#endif\r
+#if defined(CFG_MPC5606B)\r
+#define DSPI_D_ISR_EOQF DSPI_3_ISR_EOQF\r
+#define DSPI_E_ISR_EOQF DSPI_4_ISR_EOQF\r
+#define DSPI_F_ISR_EOQF DSPI_5_ISR_EOQF\r
+#endif\r
#endif\r
\r
#define SPIE_BAD (-1)\r
perClock = PERIPHERAL_CLOCK_DSPI_D;\r
break;\r
#endif\r
+#if (SPI_CONTROLLER_TOTAL_CNT>4)\r
+ case 4:\r
+ perClock = PERIPHERAL_CLOCK_DSPI_E;\r
+ break;\r
+#endif\r
+#if (SPI_CONTROLLER_TOTAL_CNT>5)\r
+ case 5:\r
+ perClock = PERIPHERAL_CLOCK_DSPI_F;\r
+ break;\r
+#endif\r
+\r
default:\r
assert(0);\r
break;\r
case 3:\r
ISR_INSTALL_ISR2("SPI_D",Spi_Isr_D, DSPI_D_ISR_EOQF, 15, 0);\r
break;\r
+#endif\r
+#if (SPI_CONTROLLER_TOTAL_CNT > 4)\r
+ case 3:\r
+ ISR_INSTALL_ISR2("SPI_E",Spi_Isr_E, DSPI_E_ISR_EOQF, 15, 0);\r
+ break;\r
+#endif\r
+#if (SPI_CONTROLLER_TOTAL_CNT > 5)\r
+ case 3:\r
+ ISR_INSTALL_ISR2("SPI_F",Spi_Isr_F, DSPI_F_ISR_EOQF, 15, 0);\r
+ break;\r
#endif\r
}\r
}\r