Full version of the course materials, 29 MB
Monday 3rd of April
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8:00 Registration
8:30 M1 Motivation and examples, Bengt Eriksson and Martin Torngren, 1.5 hour (KTH)
10:00 Coffee
10:15 M2 Control issues, Pedro Albertos, 2 hours (UPVLC)
12:15 Lunch
13:45 M3 RT issues, Alfons Crespo, 2 hours (UPVLC)
Tuesday 4th of April
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9:00 T1 Kernels and safe (back-up) operation, Pedro Albertos and Alfons Crespo,
1 hour (UPVLC)
10:00 Coffee
10:15 T2a Control design practical issues - principles, Bengt Eriksson, 1 hour (KTH)
11:15 T2b Control design practical issues - models, Jindrich Fuka, Jiri Roubal,
1 hour (laboratories K23 and K26 - CTU)
12:15 Lunch
13:45 T3 Integrated control design and implementation, Karl-Erik Arzen and Anton
Cervin, 2 hours (LTH)
Wednesday 5th of April
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8:00 W1 Control of Computing Systems, Karl-Erik Arzen and Anton Cervin (LTH) , 2
hours
10:00 Coffee
10:15 W2 Jitterbug and Truetime, Karl-Erik Arzen and Anton Cervin, 2 hours
(laboratory K2 – LTH)
12:15 Lunch
13:45 W3 ECS Deployment, Bengt Eriksson and Martin Torngren, 2 hours (KTH )
Thursday 6th of April
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8:00 Th1 Off-line scheduling, Zdenek Hanzalek, 2 hours (CTU)
10:00 Coffee
10:15 Th2 Platform for Advanced Process Control and Real Time Optimization,
Vladimir Havlena and Jiri Findejs, 2 hours (Honeywell Laboratory Prague)
12:15 Lunch
13:45 Th3, RT practical issues, Michal Sojka and Ondrej Spinka, 2 hours
(laboratory K09 - CTU)
Friday 7th of April
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8:00 F1 TORSCHE Scheduling Toolbox for Matlab, Premysl Sucha and Michal Kutil, 2
hours (laboratory K2 - CTU)
10:00 Coffee
10:15 F2 Implementing Floating-Point DSP and Control with PicoBlaze Processors,
Jiri Kadlec, 2 hours (CTU)
12:15 Closing remarks and discussion
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Abstracts
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M1 Motivation and examples, Bengt Eriksson and Martin Torngren, 1.5 hour (KTH)
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In this introductory session, the general problem of the course will be
presented and motivated. What Embedded systems (ES) are? What Embedded control
systems (ECS) are? Why? Motivating examples: inverted pendulum, mobile robot,
car safety control. Main issues in the design of ECS: typical requirements,
conflicting requirements, design trade-offs, typical architectures, design
parameters.
M2 Control issues, Pedro Albertos, 2 hours (UPVLC)
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Real-time implementation of control algorithms in a multitasking environment
involves a number of issues that should be taken into account. The unavoidable
delays, both in computation and in data handling, the lost of data, the change
of operation mode, the changes in sampling periods and the performance degrading
are among the main issues to be considered. In this session, a review of these
concepts for a general audience will be presented. The goal of this session
would be to emphasize the relevance of these control design issues, to be
strongly connected to the actual implementation of the control, to be discussed
in the next sessions.
M3 RT issues, Alfons Crespo, 2 hours (UPVLC)
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The aim of this session is to introduce the most important concepts of ECS from
the real-time (RT) systems perspective. The different types of RT tasks are
introduced, and the importance of RT constraints is emphasized, especially in
the context of control systems design. The central role of processor scheduling
for guaranteeing RT constraints is motivated, and the main paradigms of RT
scheduling are introduced. Fixed and dynamic priority scheduling methods are
described, including temporal analysis methods. Resource usage and jitter
control are also introduced. Finally, implementation approaches in view of the
existing RT operating systems and programming languages technologies are
discussed. The level of presentation of the topics is introductory, but a basic
knowledge of operating systems, computer architecture, and programming in a
high-level language is assumed.
T1 Kernels and safe (back-up) operation, Pedro Albertos and Alfons Crespo, 1
hour (UPVLC)
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ECS require to work in a variety of (unexpected) circumstances. The operating
system (OS) should provide a number of basic options to guarantee the safe
behaviour of ECS. In this session, a new set of operating services to provide
the applications a higher control of faults and temporal constraints will be
described. Some examples of this functionalities are: Execution timers,
application defined scheduling, fault tolerant monitors, etc. From the control
viewpoint, a hierarchical sorting of activities should be scheduled in agreement
with the OS kernel to get the best, among the possible, control options. Safe
(back-up) operation, basic control actions, optional and supervision are among
the main issues to be discussed.
T2 Control design practical issues – principles and models, Bengt Eriksson (KTH),
Jindrich Fuka, Jiri Roubal (CTU), 2 hours
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Introductory and simple exercises about control design using CACD (computer
aided control design) packages will allow a better insight into the RT control
design algorithms. Moreover, using some simple rigs, the participants will get
some hands-on control design approaches. Some principles will be demonstrated on
laboratory models.
T3 Integrated control design and implementation, Karl-Erik Arzen and Anton
Cervin, 2 hours (LTH)
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This session will focus on the interaction between the control design and
control implementation. In embedded systems, floating point arithmetic is
sometimes too costly. The problems associated with fixed point arithmetic are
discussed. The implementation platform normally introduces input-output
latencies due to computation and communication delays. The effects of this on
control performance and how it can be compensated for will be discussed. Special
emphasis will be given to the recent jitter margin concept. The implementation
platform also introduces jitter in sampling intervals. This will also be
discussed. The control server is a computational model for controller tasks that
combines the benefits of static scheduling and dynamic event-based scheduling.
Changing controller task parameters such as sampling periods on-line could
sometimes be useful in order to adapt to changing conditions. The problems
associated with this and the risk of switching induced instabilities will be
discussed.
W1 Control of Computing Systems, Karl-Erik Arzen and Anton Cervin, 2 hours (LTH)
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Using control-based approaches for modeling, analysis, and design of embedded
computer and communications systems is currently receiving increased attention
from the real-time systems community, as a promising foundation for controlling
the uncertainty in large and complex real-time systems. The control-based
approach has the potential to increase flexibility, while preserving
dependability and efficiency. In this session we will give an overview of the
work that is being done within the area with a special emphasis on two areas:
Control of Web-servers and feedback scheduling of controller tasks. An inverted
pendulum control example will illustrate some of the issues.
W2 Jitterbug and Truetime, Karl-Erik Arzen and Anton Cervin, 2 hours (laboratory
K2 – LTH)
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A hands-on session/exercise where the users will become familiar with the two
co-design tools Jitterbug and TrueTime. Jitterbug is a MATLAB-based toolbox that
computes a quadratic performance criterion for a linear control system under
various timing conditions. Using the toolbox, one can easily and quickly assert
how sensitive a control system is to delay, jitter, lost samples, etc., without
resorting to simulation. The tool is quite general and can also be used to
investigate jitter-compensating controllers, aperiodic controllers, and
multi-rate controllers. TrueTime is a MATLAB/Simulink-based tool that
facilitates simulation of the temporal behavior of a multitasking real-time
kernel executing controller tasks. The tasks are controlling processes that are
modeled as ordinary continuous-time Simulink blocks. TrueTime also makes it
possible to simulate simple models of communication networks and their influence
on networked control loops.
W3 ECS Deployment, Bengt Eriksson and Martin Torngren, 2 hours (KTH )
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The practical issues of ECS deployment will be discussed in this session,
including: ECS implementation and platform selection (e.g. which type of OS?,
which hardware?); OS configuration, components selection and loading (static vs
dynamic OS types); Cross- compiling; Code generation; Verification and
validation. A case study will illustrate the approach.
Th1 Off-line scheduling, Zdenek Hanzalek, 2 hours (CTU)
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The objective of this course is to provide an overview of different off-line
scheduling problems found in embedded systems. In order to classify the
scheduling problems, we show alpha|beta|gamma notation first. Then we develop
several algorithms for real-time monoprocessor applications. Namely we show
Bratley’s branch&bound algorithm for Cmax optimization with release dates and
deadlines and we underline main ideas of 0/1 programming solution for weighted
completion time optimization with precedence constraints. The class of
monoprocessor problems is concluded by minimization of maximum latency, i.e.
Earliest Due-Date First algorithm and Earliest Deadline First algorithm. Finally
we give an insight into the scheduling on dedicated processors and we provide
examples on code synthesis for FPGA.
Th2 Platform for Advanced Process Control and Real Time Optimization, Vladimir
Havlena, 2 hours (Honeywell Prague)
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The talk will demonstrate componentised architecture for Advanced Process
Control and Real Time Optimization. The concept will be illustrated by the
Unified Energy Solutions (UES) package developed by the Honeywell Laboratory in
Prague, a portfolio of advanced control and optimization components for
utilities and industrial energy, with the objective to operate the plant with
maximum achievable profit (maximum efficiency) under the constraints imposed by
technology and environmental impacts.
Th3, RT practical issues, Michal Sojka and Ondrej Spinka, 2 hours (laboratory
K09 - CTU)
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In this laboratory exercise the students will learn, how to use the Linux for
low level control of a laboratory model. The main goal of this session will be
to control the velocity of a DC motor. The motor is actuated by a PWM signal
realized via two bit outputs as one periodic thread. The measured velocity is
derived from two phase-shifted signals while implementing IRC (Incremental
Radial Counter) sensor as an aperiodic thread. The motor is connected to a PC
using printer port through a simple electronics consisting of a motor driver and
basic logic circuits. The organization of the session will be as follows (it is
assumed the students know to write a simple RT Linux program, Session T3):
First, the students will be provided with information on how to control parallel
port circuits through the configuration registers. Second, the students will try
to generate the PWM signal for motor control. Third, they will write the code to
measure the rotation velocity and they will program a simple PID controller for
velocity control. Finally the use of RT Linux will be discussed.
F1 TORSCHE Scheduling Toolbox for Matlab, Premysl Sucha and Michal Kutil, 2
hours (laboratory K2 - CTU)
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The aim of the seminar is to present a Matlab based Scheduling toolbox TORSCHE
(Time Optimization of Resources, SCHEduling). The toolbox is intended mainly as
a research tool to handle control and scheduling co-design problems. It offers a
collection of data structures that allow the user to formalize various off-line
and on-line scheduling problems. Potential of the toolbox will be shown on a
high level synthesis of parallel algorithms.
F2 Implementing Floating-Point DSP and Control with PicoBlaze Processors, Jiri
Kadlec, 2 hours (CTU)
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For developers using reconfigurable HW for the implementation of floating-point
DSP and Control algorithms, one key challenge is how to decompose the
computation algorithm into sequences of parallel hardware processes while
efficiently managing data flow through the parallel pipelines of these
processes. Lecture, will summarize our current experiences with architecture
based on network of Xilinx PicoBlaze controllers on a single chip. Complete
design path from model-based (Simulink) and C-based designs (Handel-C) to the
concrete reconfigurable HW will be demonstrated.
**Hanzalek Zdenek**
Czech Technical University in Prague
Karlovo náměstí 13, Prague