From 4a7eda09bfdf326460067ff15d714db0493405b8 Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Fri, 21 Dec 2012 21:23:11 +0100 Subject: [PATCH 1/1] LPC17xx and LPC178x: updates to ensure compatibility with new NXP header files. The most of the peripheral code can work with newer NXP LPC178x headers as well. Signed-off-by: Pavel Pisa --- .../defines/system_def-lx_cpu1.h | 8 ++- .../lpc178x-common/libs/bspbase/bsp0hwinit.c | 49 +++++++++---------- libs4c/i2c/i2c_c552.c | 13 ++++- libs4c/spi/spi_lpcssp.c | 13 +++++ 4 files changed, 54 insertions(+), 29 deletions(-) diff --git a/board/arm/lpc178x-common/defines/system_def-lx_cpu1.h b/board/arm/lpc178x-common/defines/system_def-lx_cpu1.h index a12f515..db6b4ee 100644 --- a/board/arm/lpc178x-common/defines/system_def-lx_cpu1.h +++ b/board/arm/lpc178x-common/defines/system_def-lx_cpu1.h @@ -650,6 +650,10 @@ /***************************************************************************/ /* io functions */ + +#define LED1_BIT BIT(LED1_PIN) +#define LED2_BIT BIT(LED2_PIN) + #define LED_GP BIT(LED2_PIN) /* GENREAL PURPOSE LED */ #define LED_ERR BIT(LED1_PIN) @@ -709,8 +713,8 @@ /***************************************************************************/ /* I2C1 configuration */ -#define I2C_DRV_SYSLESS_IRQ I2C1_IRQn -#define I2C_DRV_SYSLESS_PORT I2C1_BASE +#define I2C_DRV_SYSLESS_IRQ I2C2_IRQn +#define I2C_DRV_SYSLESS_PORT LPC_I2C2_BASE #define I2C_DRV_SYSLESS_BITRATE 10000 #define I2C_DRV_SYSLESS_SLADR 0 diff --git a/board/arm/lpc178x-common/libs/bspbase/bsp0hwinit.c b/board/arm/lpc178x-common/libs/bspbase/bsp0hwinit.c index 692146d..c1e132b 100644 --- a/board/arm/lpc178x-common/libs/bspbase/bsp0hwinit.c +++ b/board/arm/lpc178x-common/libs/bspbase/bsp0hwinit.c @@ -346,33 +346,30 @@ int uLanInit() int i2cInit(void) { - #if I2C_DRV_SYSLESS_PORT == I2C0_BASE - SC->PCONP |= (1 << 7); /*PI2C0*/ - /* SDA0 P0.27, SCL0 P0.28 */ - PINCON->PINSEL1 = (PINCON->PINSEL0 & ~0x03c00000) | 0x01400000; - - #elif I2C_DRV_SYSLESS_PORT == I2C1_BASE - SC->PCONP |= (1 << 19); /*PI2C1*/ - #if SCL1_BIT == BIT(1) - /* SDA1 P0.0, SCL1 P0.1 */ - PINCON->PINSEL0 |= 0x0000000f; - PINCON->PINMODE0 = (PINCON->PINMODE0 & ~0x0000000f) | 0x0000000A; - PINCON->PINMODE_OD0 |= 0x00000003; - #elif SCL1_BIT == BIT(20) - /* SDA1 P0.19, SCL1 P0.20 */ - PINCON->PINSEL1 |= 0x000003c0; - PINCON->PINMODE1 = (PINCON->PINMODE1 & ~0x000003c0) | 0x00000280; - PINCON->PINMODE_OD0 |= 0x00180000; - #else - #error Unknown SCL1_BIT pin position + #if I2C_DRV_SYSLESS_PORT == LPC_I2C0_BASE + LPC_SC->PCONP |= (1 << 7); /*PI2C0*/ + #ifdef SDA0_PIN + hal_pin_conf(SDA0_PIN); + #endif + #ifdef SCL0_PIN + hal_pin_conf(SCL0_PIN); + #endif + #elif I2C_DRV_SYSLESS_PORT == LPC_I2C1_BASE + LPC_SC->PCONP |= (1 << 19); /*PI2C1*/ + #ifdef SDA1_PIN + hal_pin_conf(SDA1_PIN); + #endif + #ifdef SCL1_PIN + hal_pin_conf(SCL1_PIN); + #endif + #elif I2C_DRV_SYSLESS_PORT == LPC_I2C2_BASE + LPC_SC->PCONP |= (1 << 26); /*PI2C2*/ + #ifdef SDA1_PIN + hal_pin_conf(SDA2_PIN); + #endif + #ifdef SCL1_PIN + hal_pin_conf(SCL2_PIN); #endif - - #elif I2C_DRV_SYSLESS_PORT == I2C2_BASE - SC->PCONP |= (1 << 26); /*PI2C2*/ - /* SDA2 P0.10, SCL2 P0.11 */ - PINCON->PINSEL0 = (PINCON->PINSEL0 & ~0x00f00000) | 0x00A00000; - PINCON->PINMODE0 = (PINCON->PINMODE0 & ~0x00f00000) | 0x00A00000; - PINCON->PINMODE_OD0 |= 0x00000c00; #else #error unknown I2C_DRV_SYSLESS_PORT address #endif diff --git a/libs4c/i2c/i2c_c552.c b/libs4c/i2c/i2c_c552.c index f38b931..f2fc370 100644 --- a/libs4c/i2c/i2c_c552.c +++ b/libs4c/i2c/i2c_c552.c @@ -35,7 +35,18 @@ int c552_stroke(i2c_drv_t *drv); // I2C Registers -#ifdef __LPC17xx_H__ +#if defined(__LPC177x_8x_H__) + +#define C552_CONSET(port) (((LPC_I2C_TypeDef *)(port))->CONSET) /* Control Set Register */ +#define C552_STAT(port) (((LPC_I2C_TypeDef *)(port))->STAT) /* Status Register */ +#define C552_DAT(port) (((LPC_I2C_TypeDef *)(port))->DAT) /* Data Register */ +#define C552_ADR(port) (((LPC_I2C_TypeDef *)(port))->ADR0) /* Slave Address Register */ +#define C552_SCLH(port) (((LPC_I2C_TypeDef *)(port))->SCLH) /* SCL Duty Cycle Register (high half word) */ +#define C552_SCLL(port) (((LPC_I2C_TypeDef *)(port))->SCLL) /* SCL Duty Cycle Register (low half word) */ +#define C552_CONCLR(port) (((LPC_I2C_TypeDef *)(port))->CONCLR) /* Control Clear Register */ +#define C552_MMCTRL(port) (((LPC_I2C_TypeDef *)(port))->MMCTRL) /* Monitor Mode Control */ + +#elif defined(__LPC17xx_H__) #define C552_CONSET(port) (((I2C_TypeDef *)(port))->I2CONSET) /* Control Set Register */ #define C552_STAT(port) (((I2C_TypeDef *)(port))->I2STAT) /* Status Register */ diff --git a/libs4c/spi/spi_lpcssp.c b/libs4c/spi/spi_lpcssp.c index 53269fc..e870ae1 100644 --- a/libs4c/spi/spi_lpcssp.c +++ b/libs4c/spi/spi_lpcssp.c @@ -30,6 +30,19 @@ #include #include +#if !defined(SSP0) && defined(LPC_SSP0) +#define SSP0 LPC_SSP0 +#endif +#if !defined(SSP1) && defined(LPC_SSP1) +#define SSP1 LPC_SSP1 +#endif +#if !defined(SSP2) && defined(LPC_SSP2) +#define SSP2 LPC_SSP2 +#endif +#if !defined(SC) && defined(LPC_SC) +#define SC LPC_SC +#endif + #define SSP_CR0_DSS_m 0x000f /* Data Size Select (num bits - 1) */ #define SSP_CR0_FRF_m 0x0030 /* Frame Format: 0 SPI, 1 TI, 2 Microwire */ #define SSP_CR0_CPOL_m 0x0040 /* SPI Clock Polarity. 0 low between frames, 1 high */ -- 2.39.2