thermal: check tz device is registered

Checking thermal zone device whether it is registered or not.

Bug 200011588

Change-Id: I377583f887d3dbe8258daa46d777daa6337b192f
Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/424088
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit

usb: free up composite gadget string ids on unbind

There are only 254 USB composite gadget string_ids available.
When switching gadget mode such as mtp and acm repeatedly,
they will be exhausted.

This bug has been brought up since android composite driver
introduced a way to switch gadget modes while the composite
driver is still holding its bind.

Fix this by reset next_string_id and clean up gstrings when
android gadgets are disabled. Also by removing the condition
comparing gadgets' string id to 0 because gadget string id
has to be re-assigned whenever the string count is reset.

The codes removed the condition check will work as the same
as before they have changed if the gadgets are used by other
composite drivers other than android since all of them call
bind only once and never unbind it hence no side effects considered.

Ported from https://android-review.googlesource.com/#/c/95366/

Bug 200001941

Change-Id: I1e2fbe0f59fe05b89052db62e0b61b074d8f032b
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/425165
(cherry picked from commit fc71534a90787bd763b7bd0f7c698b76b66ad251)
Reviewed-on: http://git-master/r/419340
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

video: tegra: dc: initialize cursor registers

Cursor registers have no default state. Initialize to useful defaults.

Bug 1486452
Bug 200006001

Change-Id: Iaf07bdd2c8d40ef1bae881da68a809d335a0377f
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/407682
(cherry picked from commit 4ded39f37b849849ebca44ab46e2762d71872102)
Reviewed-on: http://git-master/r/425997
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

futex : Forbid uaddr == uaddr2 in futex_requeue(..., requeue_pi=1)
Bug 200012742

futex-prevent-requeue-pi-on-same-futex.patch futex: Forbid uaddr == uaddr2 in futex_requeue(..., requeue_pi=1)

If uaddr == uaddr2, then we have broken the rule of only requeueing from
a non-pi futex to a pi futex with this call.  If we attempt this, then
dangling pointers may be left for rt_waiter resulting in an exploitable
condition.

This change brings futex_requeue() in line with futex_wait_requeue_pi()
which performs the same check as per commit 6f7b0a2a5c0f ("futex: Forbid
uaddr == uaddr2 in futex_wait_requeue_pi()")

[ tglx: Compare the resulting keys as well, as uaddrs might be
   different depending on the mapping ]

Fixes CVE-2014-3153.

Reported-by: Pinkie Pie
Signed-off-by: Will Drewry <wad@chromium.org>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Darren Hart <dvhart@linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Change-Id: I98b5f95d3f5c9e4d35c3aeec22960fdb34731c18
Reviewed-on: http://git-master/r/424612
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

video: tegra: nvmap: track vma for all handles

Clean up the code related to mmap and handle nvmap_map_info_caller_ptr
failures graciously.
Initilize h->vmas at right place.
Add sanity checks in nvmap_vma_open/_close.

Bug 1519700

Change-Id: Iede355b8a500a787992fcb23a72cf334a737ec49
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/419168
(cherry picked from commit c18228c5de319d74f68deff9c5d402ca17b64e95)
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/426092
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: tegra: fix strapping register offset

Fix strapping register offset and length for
T124/T132.

Bug 1515120

Change-Id: I2ac07667f58b4d99001e4d168adaec0cda9da62a
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/424631
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

net: wireless: bcmdhd: correct sdio_ids

BCMDHD driver uses SDIO_DEVICE_CLASS(SDIO_CLASS_NONE) ID during
sdio register process. This causes brcm driver execution, when other
SDIO peripherals with class 0 are used.
Replace SDIO_DEVICE_CLASS(SDIO_CLASS_NONE) usage by
SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_ANY_ID), to ensure bcmdhd
driver execution for Broadcom only hardware.

Bug 200013331

Change-Id: Ia31be2940b7e523e30c0740155a567e324da6be1
Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-on: http://git-master/r/424260
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

dma: coherent: error handling on heap resize failure

- Update memory resize callbacks to return error codes
- error handling on heap resize update failure

Bug 1487804
Bug 1517584

Change-Id: I5ac044677e883fbecf6d04a8c1e83794325703f3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/423748
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

ARM: tegra: add return value for VPR resize function

Bug 1487804

Change-Id: I28a44499a1a434f555f4c5206add6aeb6b92e01a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/423747
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

fs : adding null pointer check in set_worker_desc

The Bug was due to the following control flow

remove disk
 bdi_destroy()
  bdi_unregister()
   bdi->dev = NULL (bdi_writeback_workfn)

Bug 200011038

Change-Id: I3710c5b3f2106c14807bd8a5eea8a030312c8d6c
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
Reviewed-on: http://git-master/r/421995
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>

video: tegra: dp: eDP/miniDP support

To add a support for an internal eDP panel or an external DP
monitor

- reduce the HPD waiting time to reasonable
- fix Alternate Scrambler Reset To 0xFFFE setting to support an
  external DP monitor
- fix unplugged eDP/miniDP display at boot time blocking detection
  of the HDMI display
- disable dpaux clock and pad power when no eDP panel or external
  monitor connected at boot time

Note: It works with the eDP panel or the monitor connected only at
      boot time.  No run-time hot plug support yet.
Note2: Reposting due the Gerrit bug.

bug 1409738

Change-Id: I81b8bab8881a6d849d97562deabd16fe794ff812
Signed-off-by: Sungwook Kim <sungwookk@nvidia.com>
Reviewed-on: http://git-master/r/405512
(cherry picked from commit 199b1034b39f2a133623e5645e378c5a9abd1c81)
Reviewed-on: http://git-master/r/420122
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

arm64: tegra132: enter C6 for hotplug

Bug 1522953

Change-Id: Icb7fff057326a72a243037d3d64b88f99ac4fe68
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/422795
Reviewed-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

tegra: ictlr: correct the base address of init

 - The initilization of the mselect register was being done
   against the hier_ictlr register base address, instead of
   the mselect register base address. Correct the address
   to the mselect register base

Bug 1519537

Change-Id: I2de684e26ff21b4034ed5493a5991e31d01b75c1
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/424959
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Tested-by: Mitch Luban <mluban@nvidia.com>
GVS: Gerrit_Virtual_Submit

misc: tegra-profiler: squashed update to ver. 1.75

commit f8c056c12c7b72290c47afadaf8b2f16336b3238
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 11:57:52 2014 +0400

    misc: tegra-profiler: mixed backtraces

    Unwinding: switch from code with frame pointers to code
    with unwind tables.

    Bug 1487488

    Change-Id: I254a8fd762b5312f854db1fe79635a2b419091f0
    Reviewed-on: http://git-master/r/419384

commit a1d7f98fb15d4578cd140fe03a4c748e1db86c57
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 11:08:55 2014 +0400

    misc: tegra-profiler: add sched samples

    Tegra Profiler: capture task starting being scheduled on a core.
    Add sched in/out samples.

    Bug 1520808

    Change-Id: I2c62e5c1918bdba0fc997d79d8aeb3b7b63530f0
    Reviewed-on: http://git-master/r/419352

commit 6f847fd1257af28fc11b942a2f3b3dfc7eb4579f
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 09:52:29 2014 +0400

    misc: tegra-profiler: use cntvct as time source

    Tegra Profiler: use Virtual Count register (CNTVCT) as
    time source.

    Bug 1508327

    Change-Id: If37e2dbe0a256ec28575d7c1b7d601d6bc1090f5
    Reviewed-on: http://git-master/r/419305

commit d79e4f5292dae4cccb510be2b47f4ee00baa53d7
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Jun 5 09:10:47 2014 +0400

    misc: tegra-profiler: get perfmon extension

    Add version of the ARMv8 NVIDIA perfmon extension to
    device capabilities.

    Bug 1520757

    Change-Id: I18d10133272a10e3faf5022b4579c7dfea78791e
    Reviewed-on: http://git-master/r/419274

commit afedef10f26475b98b7d42ab3bab6f0c2fbb6eae
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Mon May 19 16:49:19 2014 +0400

    misc: tegra-profiler: fix hang up bug for Norrin

    Do not use probe_kernel_address.
    Actually, it is not safe on Norrin: this can lead to system crash.

    Bug 200005974
    Bug 1522252

    Change-Id: If8bae9afd7c7e1bbb5beaf430c0c61f552aeb036
    Reviewed-on: http://git-master/r/411507

commit 1b4c5247c0ab284dbed25683cbfa5a301da787ff
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 12:49:15 2014 +0400

    misc: tegra-profiler: add unwind information

    Tegra Profiler: add additional unwind information
    for each call entry.

    Bug 1514626

    Change-Id: I2873941a4c903e0e7e909897ead55eb34d80b966
    Reviewed-on: http://git-master/r/410770

commit b2f593d9bb00a380d4402f2a8cd9ed8d9646dcbd
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 12:05:36 2014 +0400

    misc: tegra-profiler: fixed recursive call chains

    In some cases, recursive call chains can be broken.
    This patch fixes this problem.

    Bug 200005395

    Change-Id: I7d31ec64b004109c3684cf0d143d9b1d6cd59f9f
    Reviewed-on: http://git-master/r/410745

commit 6c9f626340a81daf124d4bbeff2254f63cc084b7
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 11:24:50 2014 +0400

    misc: tegra-profiler: support too deep stack level

    Too deep stack level: handle it properly.
    Appropriate unwind reason code has been added.

    Unwinding based on frame pointers: add unwind reason codes.

    Bug 200005380

    Change-Id: I2199df90c746ada6a7f224a8b675638b69dc6da8
    Reviewed-on: http://git-master/r/410717

commit ddea2fc86588bdf3ae313a270364052a0beab160
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Fri May 16 10:44:06 2014 +0400

    misc: tegra-profiler: fix setup bug

    * Fix bug that happens when using non-standard profiling frequencies
    * Allow root user to use any frequency in range [100 Hz; 100 kHz]

    Bug 200005366

    Change-Id: I9a07e2c9c1fec6d61f34009d1975ea7f5d0e2592
    Reviewed-on: http://git-master/r/410705

commit 5c64bcefc4b3df0ba9612cd67703593d488ab38c
Author: Deepak Nibade <dnibade@nvidia.com>
Date:   Mon May 19 15:48:02 2014 +0530

    misc: tegra-profiler: fix resource leaks

    Fix Coverity issue of resource leaks
    Coverity id : 26481
    Coverity id : 26483

    Bug 1416640

    Change-Id: Ib71950f196b5421ccbc21b3ac8d620e790e83366
    Reviewed-on: http://git-master/r/411421

commit 2f5d99b96ba18129f6c708e3db9a1e32da24816f
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Tue May 6 09:47:02 2014 +0400

    tegra-profiler: add access to the exception tables

    Tegra Profiler: add access to the exception tables via mmap areas.
    Do not read directly from the user space.

    Bug 200002243

    Change-Id: I442daaecb11fd4416b3e485722efdf34234e0241
    Reviewed-on: http://git-master/r/405671

commit 218d8cc8a573da49145c7104258fb290c83205b9
Author: Igor Nabirushkin <inabirushkin@nvidia.com>
Date:   Thu Apr 17 13:02:07 2014 +0400

    misc: tegra-profiler: unwinding: use RCU locking

    Unwinding: use RCU locking instead of spinlocks to protect
    map of regions.

    Bug 1502205

    Change-Id: If1089b74b1f317eeaae5059de40d7a3365ae4061
    Reviewed-on: http://git-master/r/397599

Change-Id: I1ac2a5a290f723cab40463932c0a814a670cf9e7
Signed-off-by: Igor Nabirushkin <inabirushkin@nvidia.com>
Reviewed-on: http://git-master/r/424787
GVS: Gerrit_Virtual_Submit
Tested-by: Daniel Horowitz <dhorowitz@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: tegra: soctherm: fix pskip bypass program

Fix PSKIP configuration in soctherm for T132 chipset.
Bypass ramp rate only in soctherm, but program the similar
registers in ccroc the same as before as in soctherm for
correct throttling behavior.

Also added a clear comment noting the restriction of mapping
throttling_depth string and actual throttle depth configuration
in T13x due to indirect vector-based throttle selection.

Change-Id: I86635101fc61229e54b22db67f134917e6a7e0aa
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/423359
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Edward Riegelsberger <eriegels@nvidia.com>

Revert "drivers: misc: Put CPU1 online before LP0"

This reverts commit 7e2ffe6c059b6fbae01480605e5aef8093e5fb4c.

No longer need this WAR here as it has been better implemented in pm.c
by setting the suspend_in_progress flag earlier on the suspend path.

Bug 1522953

Change-Id: Ib1dca4e1c0babca2895d9ab751a6b7df4f039011
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/422816
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peng Du <pdu@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

ARM64: tegra: Set suspend_in_progress flag early

Set the suspend_in_progress flag early in suspend_prepare and call
cpu_up on offline CPUs to get them out of C6 on suspend. This ensures
that all CPUs (CPU1) are in C7 before LP0 is requested.

Bug 1522953

Change-Id: I7f74f0afb2bfda92c03cc20262a6acaf8716d034
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/422815
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peng Du <pdu@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: do not idle timed out channels

While suspending the device, do not submit WFI on
timed out channels

Submitting WFI on timed out channels will cuase submit_wfi()
to return error and as result of this, rail gating of device
will be prevented

Bug 200010416

Change-Id: Ic097bfdae59dbf9e1f2aea5d8d0431b5f1c3721b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/422743
(cherry picked from commit 9ac601c0035240f6bacc3c42c5cc9e7b85a65456)
Reviewed-on: http://git-master/r/424542
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

gpu: nvgpu: bail out from poweroff if channel suspend fails

During gk20a_pm_prepare_poweroff(), if call to gk20a_channel_suspend()
fails, we proceed to disable other components and then return error.
But when genpd sees the error, it will abort the suspend sequence and
keep the device state as active.

But since we have already disabled all the components, GPU lands in
invalid state.

Hence, if channel_suspend() fails then do not proceed but return
the error immediately

Bug 200010416

Change-Id: I553a2a25832a1be4941bb6b6ce490c950cdbe7fa
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/422248
(cherry picked from commit 7352415a206b6bec41c762085e49efec5036dec9)
Reviewed-on: http://git-master/r/424541
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

video: tegra: host: fix setclass order in gather submit

We submit gathers in submit_gathers() as below :
1) set class to class id sent from user space
2) call add_sync_waits() which sets class to HOST1X
   and adds host waits
3) and then we proceed to insert gathers sent from user space
   (which now see wrong class id set i.e. HOST1X)

This results in setting wrong class ids and causes
abnormal behaviour

To fix this, rewrite this sequnce as below :
1) call add_sync_waits() which sets class to HOST1X
   and adds host waits
2) set class to class id sent from user space
3) and then we proceed to insert gathers sent from user space
   (and now we have correct class id set for this gather)

Bug 1521367

Change-Id: Ifef00ae8b4431ea440ac6f9048111a3136e3bb3e
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/423707
(cherry picked from commit 83d938ee3ad390298768b2267fb157799cee610b)
Reviewed-on: http://git-master/r/424540
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

pcie: host: tegra: Update prod setting for Gen2

Update prod settings for Gen2 High Swing TX
Amplitude

Bug 1476459

Reviewed-on: http://git-master/r/422694
(cherry picked from commit 82af7145023762ee27ebc0cede3c9163ea1e6ef1)

Change-Id: Id967133f6e22ccad7ba7f46c56c57a4984e53686
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Reviewed-on: http://git-master/r/424189
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

oom_kill: add rcu_read_lock() into find_lock_task_mm()

find_lock_task_mm() expects it is called under rcu or tasklist lock, but
it seems that at least oom_unkillable_task()->task_in_mem_cgroup() and
mem_cgroup_out_of_memory()->oom_badness() can call it lockless.

Perhaps we could fix the callers, but this patch simply adds rcu lock
into find_lock_task_mm().  This also allows to simplify a bit one of its
callers, oom_kill_process().

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Cc: Sergey Dyasly <dserrg@gmail.com>
Cc: Sameer Nanda <snanda@chromium.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: "Ma, Xindong" <xindong.ma@intel.com>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: "Tu, Xiaobing" <xiaobing.tu@intel.com>
Acked-by: David Rientjes <rientjes@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Change-Id: I5f214dec13b34e05c4b5fc8bc29df3ab7400efa1
Reviewed-on: http://git-master/r/421705
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Kerwin Wan <kerwinw@nvidia.com>

oom_kill: has_intersects_mems_allowed() needs rcu_read_lock()

At least out_of_memory() calls has_intersects_mems_allowed() without
even rcu_read_lock(), this is obviously buggy.

Add the necessary rcu_read_lock().  This means that we can not simply
return from the loop, we need "bool ret" and "break".

While at it, swap the names of task_struct's (the argument and the
local).  This cleans up the code a little bit and avoids the unnecessary
initialization.

Signed-off-by: Oleg Nesterov <oleg@redhat.com>
Reviewed-by: Sergey Dyasly <dserrg@gmail.com>
Tested-by: Sergey Dyasly <dserrg@gmail.com>
Reviewed-by: Sameer Nanda <snanda@chromium.org>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mandeep Singh Baines <msb@chromium.org>
Cc: "Ma, Xindong" <xindong.ma@intel.com>
Reviewed-by: Michal Hocko <mhocko@suse.cz>
Cc: "Tu, Xiaobing" <xiaobing.tu@intel.com>
Acked-by: David Rientjes <rientjes@google.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Change-Id: Iee512a4e3446b1ec8fb7fcc434f1cf18a13a5645
Reviewed-on: http://git-master/r/421704
Reviewed-by: Sri Krishna Chowdary <schowdary@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Kerwin Wan <kerwinw@nvidia.com>

gpu: nvgpu: Remove extraneous FB flush calls

gk20a_mm_fb_flush() invoked G_ELPG_FLUSH and FB_FLUSH. Remove the
invokation of G_ELPG_FLUSH. Replace calls to gk20a_mm_fb_flush() with
gk20a_mm_l2_flush() when appropriate.

Bug 1421824

Change-Id: I02af4bdc3b7bd26d0f6a8d610f70349269775a36
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408210
(cherry picked from commit f02f34a8d214d883c949ab55fe872d4176a21bc5)
Reviewed-on: http://git-master/r/423230
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

gpu: nvgpu: When rail gating, flush only once

When rail gating invoke G_ELPG_FLUSH only once.

Bug 1421824

Change-Id: Ibde0e32b212e3b030e69a9cb837c87789887aabb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/408209
(cherry picked from commit 7c8c12eef2e4ce132b5cec239dc59b24888f4c9c)
Reviewed-on: http://git-master/r/412482
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

PM / Runtime: Fix error path for prepare

If a device prepare callback for some reason would fail, the PM core
prevented the device from going inactive forever.

In this case, to reverse the pm_runtime_get_noresume() we invokes the
asyncronous pm_runtime_put(), thus restoring the usage count.

bug 1518244

Change-Id: Ia4984630e71abeb55ef90a19799d1fea700b2148
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit aa1b9f13b3346352455bfdc343ecff7667b84ff5)
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/423999
Reviewed-on: http://git-master/r/424177
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

spi: tegra114: Move IST work to caller thread

Remove IST(interrupt service thread) and move
that functionality to caller thread

Bug 1501764

Change-Id: Id310c75939be62a5121f2b2f68f14a146256b4aa
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/399627
(cherry picked from commit f6366d4f846425bbfa0d8e919a974eff7429862f)
Reviewed-on: http://git-master/r/424075
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

arm64: tegra132: tn8: Set vdd_rtc to static 0.95V

It is from characterization team's request since there is no rtc tracking
in TN8.

Bug 1519080

Change-Id: Ic773aac0bcd443723dba498488a8b5864db1b36b
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/419840
(cherry picked from commit dff02e75865cd08e8bbdd69574b3610bfbc49259)
Reviewed-on: http://git-master/r/421372
Signed-off-by: Jiukai Ma <jiukaim@nvidia.com>
Reviewed-on: http://git-master/r/424037
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

usb: gadget: tegra: reset extcon state in cable disconnect

For QC2.0 charger we set two cable types. Resetting the
extcon state during cable disconnect so that all the
cables types are cleared.

Bug 200011709

Change-Id: I3e5bf896869045f5eefb68723411abbc864ae76d
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/422715
(cherry picked from commit b546521e81a106c1aea35d3198fc135b67e64913)
Reviewed-on: http://git-master/r/423473
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

ARM: tegra: ardbeg: support 4K HDMI monitor

Change tegra_fb2_size for 4K HDMI monitor support.

bug 200001130

Change-Id: I9e89dac7f602f74d1cdd761f05d1af2439c47add
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/423425
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

gpu: nvgpu: Prune redundant cache maintenance

Remove redundant cache maintenance operations. Instance blocks and
graphics context buffers are uncached, so they do not need any cache
maintenance.

Bug 1421824

Change-Id: Ie0be67bf0be493d9ec9e6f8226f2f9359cba9f54
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/406948
(cherry picked from commit 179d6ff3b2845e99d1719a9ba10862f2d3b22080)
Reviewed-on: http://git-master/r/423229
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

arm64: tegra: hotplug support for Denver hardwoord

Change-Id: Ifb524fe0a7061371136c380218fca8bc762b38ea
Signed-off-by: Peng Du <pdu@nvidia.com>
Reviewed-on: http://git-master/r/407169
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Miao <emiao@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>

ARM: dt: fix 64 bit mem size in E1791

update address/size of memory-controller
node to 64 bit

Bug 1396089

Change-Id: I1d83959edf990a7d2a179152ac07aa9c87ff903c
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/416393
(cherry picked from commit 2bf9ad2147e328c073fad29e0f8e80d65f173fcf)
Reviewed-on: http://git-master/r/423808
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
GVS: Gerrit_Virtual_Submit

Revert "Revert "input: touch: raydium: Code drop V73.9""

This reverts commit 96ec201230966872c1c4b3b2197c6e457f0236e0.

Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Change-Id: Ie7127c66af2fa20ede0d512dc0d1d08499d2a8be
Reviewed-on: http://git-master/r/423316
Reviewed-by: Chao Xu <cxu@nvidia.com>
GVS: Gerrit_Virtual_Submit

arm: tegra124: PM375: update soc0 machine name

This commit adds a new machine name for PM375 boards.

bug 1395699

Change-Id: Ia07b86a03e2457b192095b0bb01cc7ee900641d7
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: http://git-master/r/381774
(cherry picked from commit 03b586d56df60b73d211c4b834adffa5990fb93c)
Reviewed-on: http://git-master/r/418544
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jong Kim <jongk@nvidia.com>

staging: iio: light: cm3217: remove pm ops

Remove suspend and resume pm ops as sensorservice takes
care of activate/deactivate of sensor as required.

Also, put the device to standby mode if regulator is still enabled.

Change-Id: I5169409f679319fe42c89d7debd305c5c885fd15
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/415042
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

ARM: dtb: norrin: enable powergood_ac_ok_mask

Enable ac_ok_mask for OC_PG signal

Bug 1518725
Bug 1419425

Change-Id: Ief0ab18d80551b2f4c55090bcccf1f3c573569c8
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423037
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

mfd: as3722: Documentation for oc_pg_ctrl masking

Update Documentation for device tree update for
optional oc_pg_ctrl_masking feature

Bug 1518725
Bug 1419425

Change-Id: I309533849d48d61aefebd8f477e79b79ed4127fb
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423185
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

mfd: as3722: add oc_pg_ctrl enabling support

Based on DT or pdata for the board used, add support
to mask oc_pg_ctrl  and oc_pg_ctrl2 signal

Bug 1518725
Bug 1419425

Change-Id: Ie69c1de37b9f428e23268dad009dfff36cb1463d
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/423036
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit

iio: meter: ina230: fix return value of ina230_set_channel

On success, ina230_set_channel needs to return the number of
characters written.

Change-Id: I4ed249c0c4c86792b3b590eb4c1a532dcfd57f3a
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/422792
(cherry picked from commit 0ad59e7418ae0809354e5178ee641b69deda3ad0)
Reviewed-on: http://git-master/r/422799
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

gpu: nvgpu: Dump offending push buffer fragment

When outputting debug dump, print the contents of current push buffer
segment.

Also changes the debug dump to use pr_cont when applicable, and dumps
state before recovering in case channel was not loaded to an engine.

Bug 1498688

Change-Id: I5ca12f64bae8f12333d82350278c700645d5007e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/422208
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

mmc: tegra: add tap hole coeff for 200MHz for SDMMC3

This patch adds tap hole coeff for 200MHz for SDMMC3,
for tegra12x

Bug 1505798

Change-Id: I54de2a7529952367e361d8bd55a669335142193f
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/412543
(cherry picked from commit f2a9fc57238de62bc996f7565850b7012e1f5962)
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422035
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

ARM: tegra: sdhci: set max clk to 200MHz for SDMMC3

This patch sets max clk limit to 200MHz for SDMMC3 for PM375.
Requesting 208MHz results in getting 204MHz from PLL_P and CRC
errors are seen.

Bug 1505798

Change-Id: I14825335fa5895ef2dde905f1e3cd568d2dafa62
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/412542
(cherry picked from commit fbcb0018d3622dedeb4c9413b9b774c4c9d49d36)
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422034
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

gpu: nvgpu: Turn on scaling when powered

This patch reorders scaling resume to happen always when
we power on the GPU, so as to balance the scaling suspend
when we power off GPU.

bug 200010911

Change-Id: I9fde817fbf9fed7d90c48ea06050db4b82e670a8
Signed-off-by: Allen Yu <alleny@nvidia.com>
Reviewed-on: http://git-master/r/421543
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

ARM: T132: DVFS: Increase cpu frequency granularity below vmin

Granularity set at 25.5mhz upto 1020Mhz.

Bug 1509711

Change-Id: I80d4e78a2c8d1fe995a88ed220b7831b500e162f
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-on: http://git-master/r/417245
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

i2c: tegra: do bit-banging for i2c transfer at 50KHz.

Bit-banging is enabled dueing power off. Do the bit-banging method
of data transfer at 50KHz.

Change-Id: I641ddb8c85c34aace2c82ab666de8c7630ef0395
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/423071
GVS: Gerrit_Virtual_Submit

i2c: algo: add more error/info prints

Enable more error/info prints to know the status of the
transfer if it fails.

Also when sending bytes, ignore the last byte ACK from the slave.

Change-Id: I2b655da28545362d6e7855baceedbfd8588b3e43
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/423070
GVS: Gerrit_Virtual_Submit

arm64: enable deprecated SETEND instruction in SCTLR compat config

Bug 200004840

Change-Id: I703d4843f8aab2ec63324f04cc13aaabae88e163
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/422174
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

arm64: make SCTLR compat config depend on CONFIG_ARMV7_COMPAT

Conflicts:
arch/arm64/mm/proc.S

Bug 200004840

Change-Id: I76e0067839c96e3082b42c80d3fc670cf3d371b5
Signed-off-by: Rich Wiley <rwiley@nvidia.com>
Reviewed-on: http://git-master/r/422173
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alexander Van Brunt <avanbrunt@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>

ASoC: Tegra: Simplify eos detection logic

Bug 200008134

Change-Id: I3f39c15a91fb76958b739636eddb6d8480898d21
Signed-off-by: Ravindra Lokhande <rlokhande@nvidia.com>
Reviewed-on: http://git-master/r/422171
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Chandrakanth Gorantla <cgorantla@nvidia.com>
Reviewed-by: Sumit Bhattacharya <sumitb@nvidia.com>

arm: tegra: tweak cpu-emc ratio

the old cpu-emc ratio is probably not very optimal
for newer CPUs with higher max CPU and EMC frequencies.
It would be better if have a table of these per CPU
architecture but tuning this hard-coded value for now
won't make things any worse.

Also, much lower CPU_AVG_ACT_THRESHOLD is used for
tegra12x and tegra13x

Bug 1455015
Bug 1473244
Bug 1497785
Bug 1500639
Bug 1504328
Bug 200004223

Change-Id: I96d4d4d36474c1d7f1d62762666e944fbd04b03e
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/411700
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

staging: iio: light: iqs253: cancel workqueue

 - Any lingering workqueue must be cancelled
   during the shutdown, to prevent them from running
   during a shutdown
 - In most cases, they are harmless, but they will
   trigger a warning if the i2c bus is shutdown during the
   shutdown as done on some platforms

Bug 1522172

Change-Id: I465e19ef793cf72f5f533b0e2c9e9f3e837c2133
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/421345
(cherry picked from commit b04ebe7fc2a77897b0020412f2a1ab0de94aa7c1)
Reviewed-on: http://git-master/r/422776
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

staging: iio: light: add shutdown

 - Depending on the platform, i2c bus may be shutdown
   as we shutdown the systme
 - In such a case, any lingering workqueue would slowdown
   the system, as the access will be made to the i2c bus
   which has been shutdown
 - To mitigate the above, cancel all workqueue jobs as we shutdown

Bug 1522172

Change-Id: Idebab822c0ef8ddad7352ef25a546acb3f3e5870
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/420889
(cherry picked from commit 8b39b8db93e5b34672b7cbcf9f6c5ec40398ca83)
Reviewed-on: http://git-master/r/422775
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

gpu: nvgpu: flush write before unlocking

 - gk20a_enable is reading the clock after unlocking the spinlock
   to flush any previous write
 - This could lead to a race if any write afterwards assume
   the write has been completed already
 - Read the clock before unlocking to ensure all previous writes
   have been completed before letting any other thread use gk20a

Bug 200007520

Change-Id: I737fbbe825c68b25ca256c4a8ee2b99aa8baf0f5
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/418485
(cherry picked from commit 2aed542a719caa69620766bf2dceefe50626c189)
Reviewed-on: http://git-master/r/422773
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

arm: tegra: Don't place CSIC/D IOs in DPD mode

According to TRM placing CSIC/D IOs in DPD mode
is no longer available

Bug 200010066

Change-Id: Ic389dba406b06a7c821fa8399ae1854f3ebcac98
Signed-off-by: Preetham Chandru R <pchandru@nvidia.com>
Reviewed-on: http://git-master/r/422677
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

driver:media:tegra: ov5693 add reg in mode table

Setting one of the missing registers for the 2592x1944
mode table. This register value prevents frame drops
when coarse time is updated.

bug 1516678

Change-Id: Icebbca9d7800d609146800678f22ee68de690c4c
Signed-off-by: David Wang <davidw@nvidia.com>
Reviewed-on: http://git-master/r/422289
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bhushan Rayrikar <brayrikar@nvidia.com>
Reviewed-by: Gary Fitzer <gfitzer@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

hrtimer: enhance power efficiency

Defining relaxed version of hrtimer_callback_running(),
which will be used to improve power efficiency through
the use of macro cpu_relaxed_read_long.

Bug 1440421

Change-Id: Ie42d7ae9628a817d52f4636781e11b607327c2c5
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398789
(cherry picked from commit 0d9f5fc1d39d7d1809519b5d11bf7ac72287b7c6)
Reviewed-on: http://git-master/r/422255
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

thread_info: enhance power efficiency

Using cpu_relaxed_read_long and defining relaxed
version of some macros, and functions so that it
can be used to improve power efficiency.

bug 1440421

Change-Id: If857ff7110cffadc6f13289a6395d253a8e3e232
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/380859
(cherry picked from commit a66b23c6971403594cc6a82923c8df3b8472de90)
Reviewed-on: http://git-master/r/422251
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm64: processor.h: remove redundant macros

Removing cpu_relaxed_read and cpu_relaxed_read_long macros from
processor.h, as these macros are defined in asm/relaxed.h.

bug 1440421

Change-Id: Ic766ac6e34eefe93f90349c088626a0fb277670c
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/400127
(cherry picked from commit 108bf0b30d72c52e33dd4fec71dd1ed5baf13ed2)
Reviewed-on: http://git-master/r/422214
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm64: asm: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which contains
arm64 specific macros which will be used to improve
power efficiency of arm64.

bug 1440421

Change-Id: Iee14115490cb16001d5eac9e309ee6e088b88f44
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398323
(cherry picked from commit beb69cd6d2893c36712d4f927e41da0de729d651)
Reviewed-on: http://git-master/r/422212
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: asm: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which uses generic
definitions of some macros used by arm64 for improving
power efficiency.

bug 1440421

Change-Id: I654dcef609812e3bb54e6c892c1554f9cbb4bd3d
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398766
(cherry picked from commit a96e59b1959f3ee216503b4f9df3cb75f7093ed6)
Reviewed-on: http://git-master/r/422211
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

asm-generic: processor.h: remove redundant macros

Removing cpu_relaxed_read and cpu_relaxed_read_long macros from
processor.h, as these macros are defined in asm-generic/relaxed.h.

Bug 1440421

Change-Id: I5d1ba25755e1c9d33b080dfe01ba838289f306af
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/400093
(cherry picked from commit 57eb21e2d4cad3ce1f85283cfffd0eff85a6d17d)
Reviewed-on: http://git-master/r/422209
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

asm-generic: relaxed.h: defined relaxed.h

Defined a new header file relaxed.h, which contains basic
macros which will be used for improving power efficiency for
arm64.

bug 1440421

Change-Id: I5ae7503afdfbaa951827bbf466d8ddccf444f558
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/398315
(cherry picked from commit dd434aeb1afea1d9ebce1099fb6ecfa7c6c762c6)
Reviewed-on: http://git-master/r/422203
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

video: tegra: host: add wmb() before updating PUT

Add write memory barrier wmb() at all places where we update the
dma PUT pointer. We can add this call once we modify PUT and before
we start the cdma.

This is to take care of cache maintenace before
every time we modify PUT pointer and start the cdma.
wmb() ensures that cdma will fetch latest copy of all the buffers
from memory

Change-Id: If01deef7a1c0b4e82de416ee966d9ba51115b34f
Signed-off-by: Bhanu Murthy V <bmurthyv@nvidia.com>
Change-Id: I03bd551220eafa7f3e02476458458de5128c7768
Reviewed-on: http://git-master/r/421524
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Tested-by: Soumenkumar Dey <sdey@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

arm64: atomic.h: defining relaxed atomic_read

Defining relaxed version of atomic read as cpu_relaxed_read_atomic
which will be used for improving power efficiency for arm64.

bug 1440421

Change-Id: I5a88b8e66ec3021335905109010efc856ffa7c7e
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
(cherry picked from commit f53c05073d148adfe7abe153f1569c4bd655fb44)
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/415639
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

arm: atomic.h: defined relaxed atomic_read

Defining relaxed version of atomic read as cpu_relaxed_read_atomic.

bug 1440421

Change-Id: I39303d72350985890c7eb5a1afc768c3f8064b47
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
(cherry picked from commit 6c20e8c2aed05ad1a9d1b41cfdd875dc377db44c)
Reviewed-on: http://git-master/r/415637
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

asm-generic: atomic.h: relaxed atomic_read

Defining relaxed version of atomic read as cpu_relaxed_read_atomic
which will be used for improving power efficiency for arm64.

bug 1440421

Change-Id: I6ac26653ec3d62f74d8c21f250dcdaf9dfb75b9b
Signed-off-by: Alex Van Brunt <avanbrunt@nvidia.com>
(cherry picked from commit 7360c3df73afa07361eecab730903e0697d3408f)
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/415628
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

ARM64: tegra: config: disable IKCONFIG_PROC for security

This commit adapts ab9d93ee40c641a502e834edda6223f45d8e2083
to ARM64

Bug 200012659

Change-Id: I34877c0c4a3863dbd2f7667958ff505362950a5e
Signed-off-by: Tom Cherry <tcherry@nvidia.com>
Reviewed-on: http://git-master/r/422842
GVS: Gerrit_Virtual_Submit

asoc: rt5639: lower verbose level of hp_amp_power()

hp_amp_power is called multiple times during widget
power on and power on/off info is helpful in debugging.
so moving print from info to debug.

Bug 200010480

Change-Id: Id8db60f1617cd7a5d939ffcf8192201658d6fe96
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/422579
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

arm: tegra: soctherm: fix throt level debug

This change fixes the show-regs output for OC5 throttle which
broke when "refactor throt level & vect" change was reverted.

Bug 200006274
Bug 200009441

Change-Id: I5a0843098baa7a6d041ceac86102d25d98dbae99
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/421891
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

thermal: remove all unsigned type use for temperature

Bug 1516918

Change-Id: I5615b0657d255d9134415d92d372771baa4271e1
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/420818
GVS: Gerrit_Virtual_Submit
Reviewed-by: Josh Kuo <joshk@nvidia.com>
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>

arm: tegra: add tegra13 support

CONFIG_ARCH_TEGRA_13x_SOC check should be added
to actmon code when CONFIG_ARCH_TEGRA_12x_SOC is
checked so the kernel won't pick-up old tegra's
actmon parameters.

Bug 1455015
Bug 1473244
Bug 1497785
Bug 1500639
Bug 1504328
Bug 200004223

Change-Id: I53914949961cb2cf217e8f59be98a9549f3e86a3
Signed-off-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-on: http://git-master/r/412031
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

gpu: nvgpu: remove unused vpr refetch functions

VPR resize is done by forcing GPU to idle and then updating
VPR size from TLK.
There is no need now to call vpr_resize funtion from kernel
and hence these functions can be removed.

Bug 1487804

Change-Id: I758a6e0a99a58757866f1138b0a89594e2a33908
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421703
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

ARM: tegra: remove vpr refetch call from kernel

Remove vpr refetch from kernel
Do VPR refetch in below sequence :
- first force idle the GPU
- then do SMC call to update VPR size
- unidle the GPU
- while GPU is resuming from rail gated, it will fetch latest
  VPR settings on its own
- Hence there is no need to explicitly call vpr_refetch call
  in kernel

Bug 1487804

Change-Id: I310acfa6d812e71fe3038b601763b43e8cf44d23
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421702
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: allocate secure buffer in probe

Allocate dummy secure buffer of size PAGE_SIZE during gk20a_probe().
This will also help to initiate first secure memory (VPR)
resize call while GPU is rail gated and in reset.

This dummy buffer is released after we allocate some more
secure memory buffers in alloc_global_ctx_buffers()

Bug 1487804

Change-Id: I61604d9e5ffb585801ee893435c98a0d3e69d666
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421701
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

gpu: nvgpu: add APIs to allocate/free dummy secure buffer

Add APIs to allocate and free dummy secure buffer of size PAGE_SIZE.
Also, fix small errors during secure memory alloc/free.

Bug 1487804

Change-Id: If078116fb973e81bfcee054b900c09a313e389c6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/421700
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: sysfs to put gpu into idle

- Add a sysfs "force_idle" to forcibly idle the GPU
- read on this sysfs will return the current status

0 : not in idle (running)
1 : in forced idle state

"echo 1 > force_idle" will force the gpu into idle
"echo 0 > force_idle" will cause the gpu to resume

Bug 1376916
Bug 1487804

Change-Id: I48dfd52e0d14561220bc4baea0776d1bdfaa7ea5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
(cherry picked from commit 44d89a68bf6c9034c8bf9f5111d733290e7cb71e)
Reviewed-on: http://git-master/r/421699
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: add railgate check in do_idle()

In gk20a_do_idle(), check gk20a rail status before returning.
If rail is off, then only return success otherwise return
failure

Bug 1376916
Bug 1487804

Change-Id: I6280bf06c686b8baa4d6f49e90f47148411c3e02
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/415281
(cherry picked from commit e30047a60e809aad55e396bec41b8662f4795505)
Reviewed-on: http://git-master/r/421698
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: add is_railgated() callback

Add is_railgated() platform callback to check status
of gk20a power rail

Bug 1376916
Bug 1487804

Change-Id: Ia0d909210dc409ab684eb6f20528b81500aecd5c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
(cherry picked from commit 880faf88124d0f1b187e073cc627db5a6955b2ba)
Reviewed-on: http://git-master/r/421697
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: gk20a: add do_{idle()/unidle()} APIs

Add below two new APIs for gk20a :

1) gk20a_do_idle()
this API will force GPU to idle and railgate

2) gk20a_do_unidle()
this API will unblock all the tasks blocked by do_idle()

Bug 1487804

Change-Id: Ic5e7f2d19fb8d35f43666d0e309dde3022349d92
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412061
(cherry picked from commit 932879a81499b8a7bd4eac1b985141fde8b39a0b)
Reviewed-on: http://git-master/r/421696
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: gk20a: add busy lock

- add rw_semaphore busy_lock for gpu busy() path
- take read lock on busy_lock inside gk20a_busy()
  so that all usual requests can execute simultaneously
- write lock can be taken when we need to block all
  of the gk20a_busy() calls

Bug 1487804

Change-Id: I1b162b38bce9621723d3e45280c6076816cf771a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412060
(cherry picked from commit 725f970aa378619bc9f0a928cd22fdaaf42698e5)
Reviewed-on: http://git-master/r/421695
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

gpu: nvgpu: gk20a: export wait_channel_idle()

- Export gk20a_wait_channel_idle() function from channel_gk20a.h
- also, return error -EBUSY from this function when channel is
  found to be not idle

Bug 1487804

Change-Id: Ia7425e9b1332260ee9a53dca55ab07541f2755a9
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/412059
(cherry picked from commit 24c474f62c44a9c0b62b66342336876536481831)
Reviewed-on: http://git-master/r/421694
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

arm: tegra: pm: add delay between writes to IO_DPD_REQ

SW should explicity add delay between writes to IO_DPD_REQ and
IO_DPD2_REQ registers. This is because we use the same state machine
for both the registers.

The time between writes should be apb clk * (SEL_DPD_TIM + 5).
The worse case of apb clk is 32Khz,
SEL_DPD_TIM is configured as 0x10.
delay = (1/32000) * (16 + 5) which approximately 700us.

Bug 200002717

Change-Id: Icf4efdbc38ccdaca30a9d86da488ac796b657b36
Signed-off-by: Jay Cheng <jacheng@nvidia.com>
Reviewed-on: http://git-master/r/411065
(cherry picked from commit ebba7445ff9a32af6bb1759ac70311f66e2986cb)
Reviewed-on: http://git-master/r/412826
Reviewed-on: http://git-master/r/418379
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

ARM: tegra12: Use runnable governor as default

Switch cpuquiet to use the runnable_threads governor instead of the
balanced governor as the default governor.

Bug 1493183
Bug 200010125

Change-Id: Ie7519e1744bb620e54be7a9c9010290a72b941f9
Signed-off-by: Sai Gurrappadi <sgurrappadi@nvidia.com>
Reviewed-on: http://git-master/r/393174
(cherry picked from commit 7074cd0c47a4fa173513ef920f71685f5bd19f89)
Reviewed-on: http://git-master/r/404124
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>

ARM: tegra12: set CPU rate to 2.2GHz for sku 0x87

Set CPU rate to 2.2Ghz for sku 0x87 (CD575M) similar
to its DSC and POP counterparts

Bug 1342499

Change-Id: I567a12bbd4787d59aee5dca466f1e1bdfb481bf1
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/421833
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

arm64: tegra132: norrin: change vret to .55V for PM374

Bug 1442659

Change retention voltage to .55V for PM374

Change-Id: I35fb398f738a91b2998c546699b1227ca5b24e42
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420821
GVS: Gerrit_Virtual_Submit
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

arm64: tegra132: tn8: change Vret to .55V for P1761 and P1765

Bug 1442659

Change retention voltage to .55V for P1761/P1765

Change-Id: Ica3947771a0379ec2177dc8cf819527629f19c5c
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420227
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

arm64: tegra132: E1973: Change Vret to .55V for E1973

Bug 1442659

Change retention voltage to .55V

Change-Id: I22ae547fa3adb0213069693967a6176d7a628a09
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420225
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

arm64: tegra132: Bowmore: Modify Vret to .55V

Bug 1442659

Change retention voltage to .55V

Change-Id: I72a363e4898bf84f43afc16c56bf764c87d7b006
Signed-off-by: Hridya <hvalsaraju@nvidia.com>
Reviewed-on: http://git-master/r/420224
Reviewed-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Reviewed-by: Chao Xu <cxu@nvidia.com>

ARM: 7840/1: LPAE: don't reject mapping /dev/mem above 4GB

With LPAE enabled, physical address space is larger than 4GB. Allow mapping any
part of it via /dev/mem by using PHYS_MASK to determine valid range.

PHYS_MASK covers 40 bits with LPAE enabled and 32 bits otherwise.

Bug 1474982

Reported-by: Vassili Karpov <av1474@comtv.ru>
Signed-off-by: Sergey Dyasly <dserrg@gmail.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit 3159f372354e8e1f5dee714663d705dd2c7e0759)

Change-Id: I37133a68642b5856c358486bddacc7c4383ea812
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: http://git-master/r/417795
(cherry picked from commit 032975cbe364d06754c3b5e2788313ea07c38ac7)
Reviewed-on: http://git-master/r/419641
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>

Asoc: Alc5639:Fix/Improve  Headset detection.

-Update from vendor to fix/improve Headset detection.

Bug 1514488
Bug 200004866

Change-Id: I7b8ca45b7f30c964013a34c8cdd5734efb544c81
Signed-off-by: Vinod Subbarayalu <vsubbarayalu@nvidia.com>
Reviewed-on: http://git-master/r/419207
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>

power: extcon:convert extcon lock to spinlock from mutex

use spinlock instread of mutex to avoid kernel warning "sleeping
function called from invalid context" if CONFIG_DEBUG_ATOMIC_SLEEP
(sleep inside atomic section checking config) enabled and usb cable
plugged/unplugged.

Bug 1522398

Change-Id: I813f959dc5cb3ce666794a8d57152b6f562046a6
Signed-off-by: Venkat Reddy Talla <vreddytalla@nvidia.com>
Reviewed-on: http://git-master/r/421988
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>

media: vb2: use FOLL_DURABLE and __get_user_pages to avoid CMA migration issues

V4L2 devices usually grab additional references to user pages for a very
long period of time, what causes permanent migration failures if the given
page has been allocated from CMA pageblock. By setting FOLL_DURABLE flag,
videobuf2 will instruct __get_user_pages() to migrate user pages out of
CMA pageblocks before blocking them with an additional reference.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
bug 1517584

Change-Id: Ic59e5219538388604087799dd26217d0ef27d7e4
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421679
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

mm: get_user_pages: migrate out CMA pages when FOLL_DURABLE flag is set

When __get_user_pages() is called with FOLL_DURABLE flag,
ensure that no page in CMA pageblocks gets locked.
This workarounds the permanent migration failures caused
by locking the pages by get_user_pages() call for a long
period of time.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
bug 1517584

Change-Id: I11b7c87e78f1022d6fded85a1ed6bac73c5f0a7c
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421678
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

mm: get_user_pages: use NON-MOVABLE pages when FOLL_DURABLE flag is set

Ensure that newly allocated pages, which are faulted in
in FOLL_DURABLE mode comes from non-movalbe pageblocks,
to workaround migration failures with CMA

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
bug 1517584

Change-Id: I76d2185cc7e77992db585a71efaa06a5c0105a76
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421677
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

mm: get_user_pages: use static inline

__get_user_pages() is already exported function,
so get_user_pages() can be easily inlined to the
caller functions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
bug 1517584

Change-Id: If700fa3c6ead133299fa99a702887584b76e5ffb
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421676
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

mm: introduce migrate_replace_page() for migrating page to the given target

introduce migrate_replace_page for migrating
page to the given target

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
bug 1517584

Change-Id: I5f1d3bcb19ca7d9c9cf7234e8d3472a42c4f40af
Signed-off-by: Vandana Salve <vsalve@nvidia.com>
Reviewed-on: http://git-master/r/421675
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

ARM: T132: Clocks: Update temperature dependent vmin for cpu

Update temperature dependent vmin for A01 cpu table version p4v4

Bug 1458402

Change-Id: I4a2200eda67278b6d2e3f2696f25c4779169e162
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/401361
(cherry picked from commit a25df4eef43bb682d70b2897ce8e2a6f5bdd9b61)
Reviewed-on: http://git-master/r/421552
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

ARM64: tegra: config: enable DETECT_HUNG_TASK

This should help debug bugs that show hard lock-ups.

Bug 200011588

Change-Id: Ib95b0b9be952151c7cc1889c867a4be54cda33f5
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/421448
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>

cpuidle-denver: fix return value check

of_property_read_u32 returns 0 on SUCCESS. At one of the places,
the return value of this function was checked with non-zero value.

This is corrected with this change.

Bug 1517221

Change-Id: I909f0c86f60a287e336ee2adbd45e0cf6b338d57
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/421522
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>