]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commit
ARM: tegra210: soc dtsi: Add Tegra misc SATA auxiliary control register
authorLaxman Dewangan <ldewangan@nvidia.com>
Thu, 11 Jun 2015 06:38:00 +0000 (12:08 +0530)
committerLaxman Dewangan <ldewangan@nvidia.com>
Sun, 14 Jun 2015 14:23:38 +0000 (07:23 -0700)
commitef535d0717248e9b22a027a8293b0e8347d55917
treedd6fc1aca45db9a1f7727295bd9c6142e4cfc239
parent6cf466a650a94ad4305ff2af1a93d68741805a78
ARM: tegra210: soc dtsi: Add Tegra misc SATA auxiliary control register

Add Tegra misc SATA auxiliary control register base address on SATA node
as this registers are going to be access from SATA driver.

bug 1627992

Change-Id: I0e21f7f330716daacbefa768650cdce1176f41e7
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
(cherry picked from commit 57594c0be4284a5a6d96e37f62f0a74b38285448)
Reviewed-on: http://git-master/r/757693
arch/arm64/boot/dts/tegra210-soc-base.dtsi