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(parent: e2a4845) | patch
ARM: tegra: increase DPD status read delay
authorBibek Basu <bbasu@nvidia.com>
Wed, 23 Oct 2013 09:12:30 +0000 (14:42 +0530)
committerLaxman Dewangan <ldewangan@nvidia.com>
Thu, 24 Oct 2013 11:46:02 +0000 (04:46 -0700)
commita29109faf53d37f36cd0577eb237f91e5d9fbbdf
tree2827ece72fef92216a05e5a6609915e327097b1ftree | snapshot
parente2a48455aed022b80d0e364c53e1bc926ac4b4c8commit | diff
ARM: tegra: increase DPD status read delay

Delay before read of a DPD_STATUS register after writing
a DPD_REQ register should be pclk * (Max DPD_TIM + 5)

Bug 1389663

Change-Id: I7e13f7587bb30005c5992b2a6ea6800a115b0840
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/302756
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
arch/arm/mach-tegra/pm-t3.c diff | blob | history